參數(shù)資料
型號(hào): LM96194CIAQX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: 9-CHANNEL POWER SUPPLY SUPPORT CKT, QCC48
封裝: LLP-48
文件頁(yè)數(shù): 7/24頁(yè)
文件大?。?/td> 542K
代理商: LM96194CIAQX
Loc
k
Register Name
Address
Description
SETUP REGISTERS
Special Function Control 1
BCh
Controls the hysteresis for voltage limit comparisons. Also selects filtered
or unfiltered temperature usage for temperature limit comparisons and
fan control.
Special Function Control 2
BDh
Enables smart tach detection. Also selects 0.5°C or 1.0°C resolution for
fan control.
x
GPI / VID Level Control
BEh
Control the input threshold levels for the VIDx, and GPIO_x inputs.
x
PWM Ramp Control
BFh
Controls the ramp rate of the PWM duty cycle when VRD_HOT is
asserted, as well as the ramp rate when PROCHOT exceeds the user
threshold.
x
Fan Boost Hysteresis (Zones 1/2)
C0h
Fan Boost Hysteresis for zones 1 and 2
x
Fan Boost Hysteresis (Zones 3/4)
C1h
Fan Boost Hysteresis for zones 3 and 4
x
Zones 1/2 Spike Smoothing Control
C2h
Configures Spike Smoothing for zones 1 and 2
x
LUT 1/2 MinPWM and Hysteresis
C3h
Controls MinPWM and hysteresis setting for LUT 1 and 2 auto-fan control
x
LUT 3/4 MinPWM and Hysteresis
C4h
Controls MinPWM and hysteresis setting for LUT 3 and 4 auto-fan control
GPO
C5h
Controls the output state of the GPIO pins
PROCHOT Control
C6h
Controls assertion PROCHOT
PROCHOT Time Interval
C7h
Configures the time window over which the PROCHOT inputs are
measured
x
PWM1 Control 1
C8h
Controls PWM control source bindings.
x
PWM1 Control 2
C9h
Controls PWM override and output polarity
x
PWM1 Control 3
CAh
Controls PWM spin-up duration and duty cycle
x
PWM1 Control 4
CBh
Frequency control for PWM1.
x
PWM2 Control 1
CCh
Controls PWM control source bindings.
x
PWM2 Control 2
CDh
Controls PWM override and output polarity
x
PWM2 Control 3
CEh
Controls PWM spin-up duration and duty cycle
x
PWM2 Control 4
CFh
Frequency control for PWM2
x
LUT 1 Base Temperature
D0h
Base temperature to which look-up table offset is applied for LUT 1
x
LUT 2 Base Temperature
D1h
Base temperature to which look-up table offset is applied for LUT 2
x
LUT 3 Base Temperature
D2h
Base temperature to which look-up table offset is applied for LUT 3
x
LUT 4 Base Temperature
D3h
Base temperature to which look-up table offset is applied for LUT 4
x
Step 2 Temp Offset
D4h
Step 2 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 3 Temp Offset
D5h
Step 3 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 4 Temp Offset
D6h
Step 4 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 5 Temp Offset
D7h
Step 5 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 6 Temp Offset
D8h
Step 6 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 7 Temp Offset
D9h
Step 7 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 8 Temp Offset
DAh
Step 8 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 9 Temp Offset
DBh
Step 9 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 10 Temp Offset
DCh
Step 10 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 11 Temp Offset
DDh
Step 11 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 12 Temp Offset
DEh
Step 12 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 13 Temp Offset
DFh
Step 13 LUT 1/2 and LUT 3/4 Offset Temperatures
15
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LM96194
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