參數(shù)資料
型號: LM96000CIMTX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: Hardware Monitor with Integrated Fan Control
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
封裝: MO-153AD, TSSOP-24
文件頁數(shù): 9/28頁
文件大?。?/td> 695K
代理商: LM96000CIMTX
Functional Description
(Continued)
1.
Set limits and parameters (not necessarily in this order):
– [5F-61h] Set PWM frequencies and auto fan control range.
– [62-63h] Set spike smoothing and min/off.
– [5C-5Eh] Set the fan spin-up delays.
– [5C-5Eh] Match each fan with a corresponding thermal zone.
– [67-69h] Set the fan temperature limits.
– [6A-6Ch] Set the temperature absolute limits.
– [64-66h] Set the PWM minimum duty cycle.
– [6D-6Eh] Set the temperature Hysteresis values.
[40h] Set bit 0 (START) to update fan control and limit register values and start fan control based on these new values.
[40h] Set bit 1 (LOCK) to lock the fan limit and parameter registers (optional).
2.
3.
3.0 AUTO FAN CONTROL OPERATING MODE
The LM96000 includes the circuitry for automatic fan control. In Auto Fan Mode, the LM96000 will automatically adjust the PWM
duty cycle of the PWM outputs. PWM outputs are assigned to a thermal zone based on the fan configuration registers. It is
possible to have more than one PWM output assigned to a thermal zone. For example, PWM outputs 2 and 3, connected to two
chassis fans, may both be controlled by thermal zone 2.At any time, the temperature of a zone exceeds its absolute limit, all PWM
outputs will go to 100% duty cycle to provide maximum cooling to the system.
4.0 REGISTER SET
Register
Address
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
31h
32h
3Eh
3Fh
40h
41h
42h
43h
44h
45h
46h
47h
48h
Read/
Write
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R
R
R/W
R
R
R
R/W
R/W
R/W
R/W
R/W
Register
Name
2.5V
VCCP_IN
3.3V
5V
12V
Processor (Zone1) Temp
Internal (Zone2) Temp
Remote (Zone3) Temp
Tach1 LSB
Tach1 MSB
Tach2 LSB
Tach2 MSB
Tach3 LSB
Tach3 MSB
Tach4 LSB
Tach4 MSB
Fan1 Current PWM Duty
Fan2 Current PWM Duty
Fan3 Current PWM Duty
Company ID
Version/Stepping
Ready/Lock/Start/Override
Interrupt Status Register 1
Interrupt Status Register 2 ERR2 ERR1 FAN4 FAN3
VID0–4
2.5V Low Limit
2.5V High Limit
VCCP Low Limit
VCCP High Limit
3.3V Low Limit
Bit 7
(MSB)
7
7
7
7
7
7
7
7
7
15
7
15
7
15
7
15
7
7
7
7
VER3 VER2 VER1 VER0
RES
RES
ERR
ZN3
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
0
0
0
0
0
0
0
0
Default
Value
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
01h
68h
00h
00h
00h
N/A
00h
FFh
00h
FFh
00h
Lock
6
6
6
6
6
6
6
6
6
14
6
14
6
14
6
14
6
6
6
6
5
5
5
5
5
5
5
5
5
13
5
13
5
13
5
13
5
5
5
5
4
4
4
4
4
4
4
4
4
12
4
12
4
12
4
12
4
4
4
4
3
3
3
3
3
3
3
3
3
11
3
11
3
11
3
11
3
3
3
3
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
LEVEL1 LEVEL0
9
LEVEL1 LEVEL0
9
LEVEL1 LEVEL0
9
LEVEL1 LEVEL0
9
1
1
1
1
STP1
LOCK
VCCP
RES
VID1
1
1
1
1
1
10
2
10
2
10
2
10
2
2
2
2
8
8
8
8
0
0
0
0
STP3
OVRID READY
5V
FAN2
VID3
3
3
3
3
3
STP2
STP0
START
2.5V
12V
VID0
0
0
0
0
0
RES
ZN2
RES
ZN1
3.3V
FAN1
VID2
2
2
2
2
2
RES
7
7
7
7
7
RES
6
6
6
6
6
RES
5
5
5
5
5
VID4
4
4
4
4
4
L
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