參數(shù)資料
型號(hào): LM6261M
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運(yùn)算放大器
英文描述: High Speed Operational Amplifier
中文描述: OP-AMP, 9000 uV OFFSET-MAX, 50 MHz BAND WIDTH, PDSO8
封裝: PLASTIC, SO-8
文件頁數(shù): 3/11頁
文件大?。?/td> 447K
代理商: LM6261M
DC Electrical Characteristics
(Continued)
The following specifications apply for Supply Voltage =
±
15V, V
= 0, R
L
100 k
and R
S
= 50
unless otherwise noted.
Boldface
limits apply for T
J
= T
MIN
to T
MAX
; all other limits T
J
= 25C.
Symbol
Parameter
Conditions
Typ
LM6161
Limit
(Notes 3, 11)
+13.5
+
13.3
13.0
12.7
3.5
3.3
1.7
2.0
30
20
30
20
6.5
6.8
LM6261
Limit
(Note 3)
+13.5
+
13.3
13.0
12.8
3.5
3.3
1.7
1.9
30
25
30
25
6.5
6.7
LM6361
Limit
(Note 3)
+13.4
+
13.3
12.9
12.8
3.4
3.3
1.8
1.9
30
25
30
25
6.8
6.9
Units
V
O
Output Voltage
Swing
Supply =
±
15V
and R
L
= 2 k
+14.2
Volts
Min
Volts
Min
Volts
Min
Volts
Max
mA
Min
mA
Min
mA
Max
13.4
Supply = +5V
and R
L
= 2 k
(Note 4)
4.2
1.3
Output Short
Circuit Current
Source
65
Sink
65
I
S
Supply Current
5.0
AC Electrical Characteristics
The following specifications apply for Supply Voltage =
±
15V, V
= 0, R
L
100 k
and R
S
= 50
unless otherwise noted.
Boldface
limits apply for T
J
= T
MIN
to T
MAX
; all other limits T
J
= 25C.
LM6161
Limit
(Notes 3, 11)
40
30
LM6261
Limit
(Note 3)
40
35
LM6361
Limit
(Note 3)
35
32
Symbol
Parameter
Conditions
Typ
Units
GBW
Gain-Bandwidth
Product
@
f = 20 MHz
50
MHz
Min
MHz
V/μs
Min
V/μs
MHz
ns
Supply =
±
5V
A
V
= +1 (Note 8)
35
300
SR
Slew Rate
200
180
200
180
200
180
Supply =
±
5V (Note 8)
V
OUT
= 20 V
PP
10V Step to 0.1%
A
V
= 1, R
L
= 2 k
200
4.5
120
PBW
t
S
Power Bandwidth
Settling Time
φ
m
A
D
φ
D
e
np-p
Phase Margin
Differential Gain
Differential Phase
Input Noise Voltage
45
<
0.1
0.1
15
Deg
%
Deg
NTSC, A
V
= +4
NTSC, A
V
= +4
f = 10 kHz
i
np-p
Input Noise Current
f = 10 kHz
1.5
Note 1:
Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C.
Note 2:
The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105C/W, the molded plastic SO (M) package is 155C/W, and the cerdip
(J) package is 125C/W. All numbers apply for packages soldered directly into a printed circuit board.
Note 3:
Limits are guaranteed by testing or correlation.
Note 4:
For single supply operation, the following conditions apply: V
+
= 5V, V
= 0V, V
= 2.5V, V
= 2.5V. Pin 1 & Pin 8 (Vos Adjust) are each connected to
Pin 4 (V
) to realize maximum output swing. This connection will degrade V
OS
, V
OS
Drift, and Input Voltage Noise.
Note 5:
C
L
5 pF.
Note 6:
In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage re-
sults in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vos, Ios, and
Noise).
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