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參數(shù)資料
| 型號： | LM5642 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High Voltage, Dual Synchronous Buck Converter with Oscillator Synchronization |
| 中文描述： | 高電壓，雙同步降壓轉(zhuǎn)換器振蕩器同步 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 667K |
| 代理商： | LM5642 |
Operating Descriptions
(Continued)
The peak current limit is set by an external resistor con-
nected between the ILIMx pin and the KSx pin. An internal
10μA current sink on the ILIMx pin produces a voltage
across the resistor to set the current limit threshold which is
compared to the current sense voltage. A 10nF capacitor
across this resistor is required to filter unwanted noise that
could improperly trip the current limit comparator.
Current limit is activated when the inductor current is high
enough to cause the voltage at the RSNSx pin to be lower
than that of the ILIMx pin. This toggles the comparator, thus
turning off the top FET immediately. The comparator is dis-
abled either when the top FET is turned off or during the
leading edge blanking time. The equation for current limit
resistor, R
lim
, is as follows:
(4)
Where Ilim is the load current at which the current limit
comparator will be tripped.
When sensing current across the top FET, replace Rsns with
the R
of the FET. This calculated Rlim value guaran-
tees that the minimum current limit will not be less than Imax.
It is recommended that a 1% tolerance resistor be used.
When sensing across the top FET, R
DS-ON
will show more
variation than a current sense resistor, largely due to tem-
perature. R
DS-ON
will increase proportional to temperature
according to a specific temperature coefficient. Refer to the
manufacturer’s datasheet to determine the range of R
DS-ON
values over operating temperature or see the Component
Selection section (Equation 4) for a calculation of maximum
R
DS-ON
. This will prevent R
DS-ON
variations from prematurely
setting off the current limit comparator as the operating
temperature increases.
To ensure accurate current sensing using V
sense, special
attention in board layout is required. The KSx and RSNSx
pins require separate traces to form a Kelvin connection to
the corresponding current sense nodes. In addition, the filter
components R14, R16, C14, C15 should be removed.
INPUT UNDER VOLTAGE LOCKOUT (UVLO)
The input under-voltage lock out threshold, which is sensed
via the VLIN5 internal LDO output, is 4.0V (typical). Below
this threshold, both HDRVx and LDRVx will be turned off and
the internal 480
MOSFETs will be turned on to discharge
the output capacitors through the SWx pins. During UVLO,
the ON/SS pins will sink 5mA to discharge the soft start
capacitors and turn off both channels. As the input voltage
increases again above 4.0V, UVLO will be de-activated, and
the device will restart again from soft start phase. If the
voltage at VLIN5 remains below 4.5V, but above the 4.0V
UVLO threshold, the device cannot be guaranteed to oper-
ate within specification.
If the input voltage is between 4.0V and 5.2V, the VLIN5 pin
will not regulate, but will follow approximately 200mV below
the input voltage.
DUAL-PHASE PARALLEL OPERATION
In applications with high output current demand, the two
switching channels can be configured to operate as a two
phase converter to provide a single output voltage with
current sharing between the two switching channels. This
approach greatly reduces the stress and heat on the output
stage components while lowering input ripple current. The
sum of inductor ripple current is also reduced which results
in lowering output ripple voltage.
Figure 2
shows an example
of a typical two-phase circuit. Because precision current
sense is the primary design criteria to ensure accurate cur-
rent sharing between the two channels, both channels must
use external sense resistors for current sensing. To minimize
the error between the error amplifiers of the two channels, tie
the feedback pins FB1 and FB2 together and connect to a
single voltage divider for output voltage sensing. Also, tie the
COMP1 and COMP2 together and connect to the compen-
sation network. ON/SS1 and ON/SS2 must be tied together
to enable and disable both channels simultaneously.
EXTERNAL FREQUENCY SYNC
The LM5642 has the ability to synchronize to external
sources in order to set the switching frequency. This allows
the chip to use frequencies from 150kHz to 250kHz. Lower-
ing the switching frequency allows a smaller minimum duty
cycle, DMIN, and hence a greater range between input and
output voltage. Increasing switching frequency allows the
use of smaller output inductors and output capacitors (
See
Component Selection
). In general, synching all the switching
frequencies in multi-converter systems makes filtering of the
switching noise easier.
The sync input can be from a system clock, from another
switching converter in the system, or from any other periodic
signal with a low-level less than 1.4V and a high level greater
than 2V. Both CMOS and TTL level inputs are acceptable.
The LM5642 uses a fixed delay scheme in order to ensure a
180 phase difference between Channel 1 and Channel 2.
Due the nominal switching frequency of 200kHz, which cor-
responds to a switching period of 5μs, Channel 2 always
begins its period 2.5μs after Channel 1 (
Figure 8
a). When
the converter is synched to a frequency other than 200kHz,
the switching period is reduced or increased, while the fixed
delay between Channel 1 and Channel 2 remains the same.
The phase difference between channels is therefore no
longer 180. At the extremes of the sync range, the phase
difference drops to 135 (
Figure 8
b) and
Figure 8
c). The
result of this lower phase difference is a reduction in the
maximum duty cycle of one channel that will not overlap the
duty cycle of the other. As shown in Input Capacitor Selec-
20060110
FIGURE 7. Current Sense and Current Limit
L
www.national.com
16
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM5642_07 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Voltage, Dual Synchronous Buck Converter with Oscillator Synchronization |
| LM5642EVAL-KIT | 功能描述:BOARD EVALUATION LM5642 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC（離線）SMPS 系列:PowerWise® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| LM5642EVAL-KIT/NOPB | 功能描述:電源管理IC開發(fā)工具 LM5642 EVAL KIT RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| LM5642MH | 制造商:Texas Instruments 功能描述: |
| LM5642MH/NOPB | 功能描述:DC/DC 開關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
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