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Application Information
(Continued)
DESIGN PARAMETERS V
SW
AND I
SW
The value of the FET "ON" voltage (referred to as V
SW
in
equations 7 thru 10) is dependent on load current. A good
approximation can be obtained by multiplying the "ON Re-
sistance" of the FET times the average inductor current.
FET on resistance increases at V
values below 5V, since
the internal N-FET has less gate voltage in this input voltage
range (see Typical Performance Characteristics curves).
Above V
IN
= 5V, the FET gate voltage is internally clamped
to 5V.
The maximum peak switch current the device can deliver is
dependent on duty cycle. For higher duty cycles, see Typical
Performance Characteristics curves.
INDUCTOR SUPPLIERS
The recommended inductors for the LM4961 is the Taiyo-
Yuden NR4012. When selecting an inductor, make certain
that the continuous current rating is high enough to avoid
saturation at peak currents. A suitable core type must be
used to minimize core (switching) losses, and wire power
losses must be considered when selecting the current rating.
PCB LAYOUT GUIDELINES
High frequency boost converters require very careful layout
of components in order to get stable operation and low
noise. All components must be as close as possible to the
LM4961 device. It is recommended that a 4-layer PCB be
used so that internal ground planes are available. See Fig-
ures 4–7 for demo board reference schematic and layout.
Some additional guidelines to be observed:
1. Keep the path between L1, D1, and Co extremely short.
Parasitic trace inductance in series with D1 and Co will
increase noise and ringing.
2. The feedback components R1, R2 and C
1 must be kept
close to the FB pin of U1 to prevent noise injection on the FB
pin trace.
3. If internal ground planes are available (recommended)
use vias to connect directly to ground at pin 2 of U1, as well
as the negative sides of capacitors C
s
1 and Co.
GENERAL MIXED-SIGNAL LAYOUT
RECOMMENDATION
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required may be some jumpers.
Single-Point Power / Ground Connection
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. It is further recommended to
place digital and analog power traces over the correspond-
ing digital and analog ground traces to minimize noise cou-
pling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and crosstalk.
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