參數(shù)資料
型號: LM4891LD
元件分類: 音頻放大器
英文描述: AUDIO AMPLIFIER|SINGLE|LLCC|10PIN|CERAMIC
中文描述: 音頻放大器|單| LLCC | 10PIN |陶瓷
文件頁數(shù): 5/23頁
文件大小: 661K
代理商: LM4891LD
Electrical Characteristics V
DD
= 2.6V
(Notes 1, 2, 8)
The following specifications apply for V
DD
= 2.6V, A
V
= 2, and 8
Load unless otherwise specified. Limits apply for T
A
=
25C. (Continued)
Symbol
Parameter
Conditions
LM4891
Units
(Limits)
Typical
(Note 6)
0.25
0.28
0.08
44 (f =
217Hz)
44 (f =
1kHz)
Limit
(Note 7)
P
0
Output Power ( 8
)
Output Power ( 4
)
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
THD = 1% (max); f = 1 kHz THD
= 1% (max); f = 1 kHz
P
o
= 0.1Wrms; f = 1kHz
V
ripple
= 200mV sine p-p
W
W
%
dB
THD+N
PSRR
Note 1:
All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristicsstate DC andAC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
,
θ
, and the ambient temperature T
. The maximum
allowable power dissipation is P
DMAX
= (T
JMAX
–T
A
)/
θ
JA
or the number given inAbsolute Maximum Ratings, whichever is lower. For the LM4891, see power derating
curves for additional information.
Note 4:
Human body model, 100 pF discharged through a 1.5 k
resistor.
Note 5:
Machine Model, 220 pF–240 pF discharged through all pins.
Note 6:
Typicals are measured at 25C and represent the parametric norm.
Note 7:
Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8:
For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I
SD
by a maximum of 2μA.
Note 9:
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10:
ROUT is measured from each of the output pins to ground. This value represents the parallel combination of the 10k ohm output resistors and the two 20k
ohm resistors.
Note 11:
If the product is in shutdown mode and V
DD
exceeds 6V (to a max of 8V V
DD
), then most of the excess current will flow through the ESD protection circuits.
If the source impedance limits the current to a max of 10 ma, then the part will be protected. If the part is enabled when V
DD
is greater than 5.5V and less than 6.5V,
no damage will occur, although operational life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 12:
All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. All bumps must be connected to achieve
specified thermal resistance.
Note 13:
Maximum power dissipation (P
DMAX
) in the device occurs at an output power level significantly below full output power. P
DMAX
can be calculated using
Equation 1 shown in the Application section. It may also be obtained from the power dissipation graphs.
Note 14:
PSRR is a function of system gain. Specifications apply to the circuit in Figure 1 whereA
V
= 2. Higher system gains will reduce PSRR value by the amount
of gain increase. A system gain of 10 represents a gain increase of 14dB. PSRR will be reduced by 14dB and applies to all operating voltages.
External Components Description
(Figure 1)
Components
1.
Functional Description
R
i
Inverting input resistance which sets the closed-loop gain in conjunction with R
f
. This resistor also forms a
high pass filter with C
i
at f
C
= 1/(2
π
R
i
C
i
).
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with R
i
at f
c
= 1/(2
π
R
i
C
i
). Refer to the section,
Proper Selection of External Components
,
for an explanation of how to determine the value of C
i
.
Feedback resistance which sets the closed-loop gain in conjunction with R
i
.
Supply bypass capacitor which provides power supply filtering. Refer to the
Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section,
Proper Selection of External
Components
, for information concerning proper placement and selection of C
B
.
2.
C
i
3.
4.
R
f
C
S
5.
C
B
L
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5
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