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參數(shù)資料
| 型號(hào)： | LM4865MWC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻控制 |
| 英文描述： | 1 CHANNEL(S), VOLUME CONTROL CIRCUIT, UUC |
| 封裝： | WAFER |
| 文件頁數(shù)： | 17/18頁 |
| 文件大小： | 520K |
| 代理商： | LM4865MWC |
Application Information (Continued)
outputs track the voltage applied to the bypass pin. The gain
of the internal amplifiers remains unity until the voltage on
the bypass pin reaches 1/2 V
DD. As soon as the voltage on
the bypass pin is stable, the device becomes fully opera-
tional and the gain is set by the external voltage applied to
the DC Vol/SD pin.
Although the bypass pin current cannot be modified, chang-
ing the size of C
B alters the device’s turn-on time and the
magnitude of
″clicks and pops″. Increasing the value of C
B
reduces the magnitude of turn-on pops. However, this pre-
sents a tradeoff: as the size of C
B increases, the turn-on time
increases. There is a linear relationship between the size of
CB and the turn-on time. Shown below are some typical
turn-on times for various values of C
B:
C
B
T
ON
0.01F
20ms
0.1F
200ms
0.22F
420ms
0.47F
840ms
1.0F
2sec
In order eliminate
″clicks and pops″, all capacitors must be
discharged before turn-on. Rapidly switching V
DD may not
allow the capacitors to fully discharge, which may cause
″clicks and pops″. In a single-ended configuration, the output
coupling capacitor, C
OUT, is of particular concern. This ca-
pacitor discharges through an internal 20k
resistor. De-
pending on the size of C
OUT, the time constant can be
relatively large. To reduce transients in single-ended mode,
an external 1k
-5k resistor can be placed in parallel with
the internal 20k
resistor. The tradeoff for using this resistor
is increased quiescent current.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figure 4 through Figure 6 show the recommended two-layer
PC board layout that is optimized for the SO-8 packaged
LM4865 and associated external components.
Figure 7
through
Figure 11 show the recommended four-layer PC
board layout for the micro SMD packaged LM4865. A
four-layer board is recommended when using the micro
SMD packaged LM4865: the two inner layers, one con-
nected to the GND pin, the other to the V
DD pin, provide
heatsinking. Both layouts are designed for use with an ex-
ternal 5V supply, 8
speakers, and 32 headphones. The
schematic for both recommended PC board layouts is
Figure
1.
Both circuit boards are easy to use. Apply a 5V supply
voltage and ground to the board’s V
DD and GND pads,
respectively. Connect a speaker with an 8
minimum imped-
ance between the board’s -OUT and +OUT pads. For head-
phone use, the layout has provisions for a headphone jack,
J1. When a jack is connected as shown, inserting a head-
phone plug automatically switches off the external speaker.
DS101025-38
FIGURE 4. Recommended SO PC board layout:
component side silkscreen
LM4865
www.national.com
8
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