參數(shù)資料
型號(hào)： LM4549BVHX/NOPB
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 消費(fèi)家電
英文描述： LM4549B AC '97 Rev 2.1 Multi-Channel Audio Codec with Sample Rate Conversion and National 3D Sound; Package: LQFP; No of Pins: 48; Qty per Container: 1000/Reel
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48
文件頁(yè)數(shù)： 15/28頁(yè)
文件大?。?/td> 927K
代理商： LM4549BVHX/NOPB
Register Descriptions
Default settings are indicated by *.
RESET REGISTER (00h)
Writing any value to this register causes a Register Reset
which changes all registers back to their default values. If a
read is performed on this register, the LM4549B will return a
value of 0D40h. This value can be interpreted in accordance
with the AC ’97 Specification to indicate that National 3D
Sound is implemented and 18-bit data is supported for both
the ADCs and DACs.
MASTER VOLUME REGISTER (02h)
This output register allows the output level from either chan-
nel of the stereo LINE_OUT to be muted or attenuated over
the range 0 dB – 46.5 dB in nominal 1.5 dB steps. There are
6 bits of volume control for each channel and both stereo
channels can be individually attenuated. The mute bit (D15)
acts simultaneously on both stereo channels of LINE_OUT.
The AC’97 specification states that “support for the MSB of
the level is optional.” All six bits may be written to the
register, but if the MSB is a ’1’, the MSB is ignored and the
register will be set to 0 11111. This will be the value when the
register is read, allowing the software driver to detect
whether the MSB is supported or not.
Mute
Mx5:Mx0
Function
0
0 00000
0 dB attenuation
0
0 11111
46.5 dB attenuation
0
1 xxxxx
As Written
0
0 11111
As read back
1
X XXXXX
*mute
Default: 8000h
LINE LEVEL VOLUME REGISTER (04h)
This output register allows the level from both channels of
LNLVL_OUT to be muted or individually attenuated over the
range 0 dB to –46.5 dB in nominal 1.5 dB steps. There are 6
bits of volume control for each channel plus one mute bit.
The mute bit (D15) acts on both channels. Operation of this
register and LNLVL_OUT matches that of the Master Volume
register and the LINE_OUT output.
MONO VOLUME REGISTER (06h)
This output register allows the level from MONO_OUT to be
muted or attenuated over the range 0 dB – 46.5 dB in
nominal 1.5 dB steps. There are 6 bits of volume control and
one mute bit (D15). All six bits may be written to the register,
but if the MSB is a 1, the MSB is ignored and the register will
be set to 0 11111. This will be the value when the register is
read, allowing the software driver to detect whether the MSB
is supported or not.
Mute
MM5:MM0
Function
0
0 00000
0 dB attenuation
0
0 11111
46.5 dB attenuation
0
1 xxxxx
As written
0
0 11111
As read back
1
X XXXXX
*mute
Default: 8000h
PC BEEP VOLUME REGISTER (0Ah)
This input register adjusts the level of the mono PC_BEEP
input to the stereo mixer MIX2 where it is summed equally
into both channels of the Stereo Mix signal. PC_BEEP can
be both muted and attenuated over a range of 0 dB to –45
dB in nominal 3 dB steps. Note that the default setting for the
PC_Beep Volume register is 0 dB attenuation rather than
mute.
Mute
PV3:PV0
Function
0
0000
*0 dB attenuation
0
1111
45 dB attenuation
1
XXXX
mute
Default: 0000h
MIXER INPUT VOLUME REGISTERS (Index 0Ch - 18h)
These input registers adjust the volume levels into the stereo
mixers MIX1 and MIX2. Each channel may be adjusted over
a range of +12 dB gain to –34.5 dB attenuation in 1.5 dB
steps. For stereo ports, volumes of the left and right chan-
nels can be independently adjusted. Muting a given port is
accomplished by setting the MSB to 1. Setting the MSB to 1
for stereo ports mutes both the left and right channels. The
Mic Volume register (0Eh) controls an additional 20 dB boost
for the selected microphone input by setting the 20dB bit
(D6).
Mute
Gx4:Gx0
Function
0
0 0000
+12 dB gain
0
0 1000
0 dB gain
0
1 1111
–34.5 dB attenuation
1
X XXXX
*mute
Default:
8008h (mono registers)
8808h (stereo registers)
RECORD SELECT REGISTER (1Ah)
This register independently controls the sources for the right
and left channels of the stereo ADC. The default value of
0000h corresponds to selecting the (mono) Mic input for both
channels.
SL2:SL0
Source for Left Channel ADC
0
*Mic input
1
CD input (L)
2
VIDEO input (L)
3
AUX input (L)
4
LINE_IN input (L)
5
Stereo Mix (L)
6
Mono Mix
7
PHONE input
SR2:SR0
Source for Right Channel ADC
0
*Mic input
1
CD input (R)
2
VIDEO input (R)
3
AUX input (R)
4
LINE_IN input (R)
5
Stereo Mix (R)
LM4549B
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相關(guān)PDF資料
PDF描述
LM4550BVH/NOPB LM4550B AC '97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound; Package: LQFP; No of Pins: 48; Qty per Container: 250/Tray
LM4550BVHX/NOPB LM4550B AC '97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound; Package: LQFP; No of Pins: 48; Qty per Container: 1000/Reel
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM4549VH 制造商:Texas Instruments 功能描述:
LM4549VHX 制造商:Texas Instruments 功能描述:
LM4550 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound
LM4550B 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC 97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound
LM4550BVH 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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