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參數(shù)資料
| 型號： | LM4549BVH/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | LM4549B AC '97 Rev 2.1 Multi-Channel Audio Codec with Sample Rate Conversion and National 3D Sound; Package: LQFP; No of Pins: 48; Qty per Container: 250/Tray |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大小： | 927K |
| 代理商： | LM4549BVH/NOPB |
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Functional Description (Continued)
REGISTER RESET is performed when any value is written
to the RESET register, 00h. It resets all registers to their
default state and will modify circuit configurations accord-
ingly but does not reset any other internal circuits.
AC Link Serial Interface Protocol
AC LINK OUTPUT FRAME:
SDATA_OUT, CONTROLLER OUTPUT TO LM4549B INPUT
The AC Link Output Frame carries control and PCM data to
the LM4549B control registers and stereo DAC. Output
Frames are carried on the SDATA_OUT signal which is an
output from the AC ’97 Digital Controller and an input to the
LM4549B codec. As shown in Figure 3, Output Frames are
constructed from thirteen time slots: one Tag Slot followed by
twelve Data Slots. Each Frame consists of 256 bits with each
of the twelve Data Slots containing 20 bits. Input and Output
Frames are aligned to the same SYNC transition. Note that
since the LM4549B is a two channel codec, it only accepts
data in 4 of the twelve Data Slots – 2 for control, one each for
PCM data to the left and right channel DACs. Data Slot 3 &
4 are used to stream data to the stereo DAC for all modes
selected by the Identity pins ID1#, ID0#.
A new Output Frame is signaled with a low-to-high transition
of SYNC. SYNC should be clocked from the controller on a
rising edge of BIT_CLK and, as shown in Figure 4 and
Figure 5, the first tag bit in the Frame (“Valid Frame”) should
be clocked from the controller by the next rising edge of
BIT_CLK and sampled by the LM4549B on the following
falling edge. The AC ’97 Controller should always clock data
to SDATA_OUT on a rising edge of BIT_CLK and the
LM4549B always samples SDATA_OUT on the next falling
edge. SYNC is sampled with the falling edge of BIT_CLK.
The LM4549B checks each Frame to ensure 256 bits are
received. If a new Frame is detected (a low-to-high transition
on SYNC) before 256 bits are received from the old Frame
then the new Frame is ignored i.e. the data on SDATA_OUT
is discarded until a valid new Frame is detected.
The LM4549B expects to receive data MSB first, in an MSB
justified format.
20123504
FIGURE 3. AC Link Bidirectional Audio Frame
20123506
FIGURE 4. AC Link Output Frame
LM4549B
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4549BVHX | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4549BVHX/NOPB | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4549VH | 制造商:Texas Instruments 功能描述: |
| LM4549VHX | 制造商:Texas Instruments 功能描述: |
| LM4550 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
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