參數(shù)資料
型號(hào): LM3151MH-5.0
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDSO14
封裝: TSSOP-14
文件頁數(shù): 9/20頁
文件大?。?/td> 479K
代理商: LM3151MH-5.0
PCB Layout Considerations
It is good practice to layout the power components first, such
as the input and output capacitors, FETs, and inductor. The
first priority is to make the loop between the input capacitors
and the source of the low side FET to be very small and tie
the grounds of each directly to each other and then to the
ground plane through vias. As shown in the figure below,
when the input cap ground is tied directly to the source of the
low side FET, parasitic inductance in the power path, along
with noise coupled into the ground plane, are reduced.
The switch node is the next item of importance. The switch
node should be made only as large as required to handle the
load current. There are fast voltage transitions occurring in
the switch node at a high frequency, and if the switch node is
made too large it may act as an antennae and couple switch-
ing noise into other parts of the circuit. For high power designs
it is recommended to use a multi-layer board. The FET’s are
going to be the largest heat generating devices in the design,
and as such, care should be taken to remove the heat. On
multi layer boards using exposed-pad packages for the FET’s
such as the power-pak SO-8, vias should be used under the
FETs to the same plane on the interior layers to help dissipate
the heat and cool the FETs. For the typical single FET Power-
Pak type FETs the high-side FET DAP is Vin. The Vin plane
should be copied to the other interior layers to the bottom layer
for maximum heat dissipation. Likewise, the DAP of the low-
side FET is connected to the SW node and it’s shape should
be duplicated to the interior layers down to the bottom layer
for maximum heat dissipation.
See the Evaluation Board application note AN-1900 for an
example of a typical multilayer board layout, and the Demon-
stration Board Reference Design App Note for a typical 2 layer
board layout. Each design allows for single sided component
mounting.
30053258
FIGURE 5. Schematic of Parasitics
30053280
FIGURE 6. PCB Placement of Power Stage
17
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LM3151/LM3152/LM3153
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LM3153MHX-2.5 SWITCHING CONTROLLER, 750 kHz SWITCHING FREQ-MAX, PDSO14
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