參數(shù)資料
型號(hào)： LM293D
廠商： MOTOROLA INC
元件分類(lèi)： 運(yùn)動(dòng)控制電子
英文描述： 8-Bit Shift Registers With 3-State Output Registers 16-SOIC -40 to 85
中文描述： DUAL COMPARATOR, 9000 uV OFFSET-MAX, 1300 ns RESPONSE TIME, PDSO8
封裝： PLASTIC, SO-8
文件頁(yè)數(shù)： 3/6頁(yè)
文件大?。?/td> 134K
代理商： LM293D
LM393, LM393A, LM293, LM2903, LM2903V
3
MOTOROLA ANALOG IC DEVICE DATA
ELECTRICAL CHARACTERISTICS
(VCC = 5.0 Vdc, Tlow
≤
TA
≤
Thigh,* unless otherwise noted.)
Characteristic
i i
Symbol
IOL
b l
LM393A
U i
Unit
μ
A
Min
Typ
Max
Output Leakage Current
Vin– = 0 V, Vin+
≥
1.0 Vdc, VO = 5.0 Vdc, TA= 25
°
C
Vin– = 0 V, Vin+
≥
1.0 Vdc, VO = 30 Vdc, Tlow
≤
TA
≤
Thigh
Supply Current
RL =
∞
Both Comparators, TA = 25
°
C
RL =
∞
Both Comparators, VCC = 30 V
–
–
0.1
–
–
1.0
ICC
mA
–
–
0.4
1.0
1.0
2.5
ELECTRICAL CHARACTERISTICS
(VCC = 5.0 Vdc, Tlow
≤
TA
≤
Thigh, unless otherwise noted.)
Characteristic
i i
Symbol
VIO
b l
LM392, LM393
LM2903, LM2903V
U i
Unit
mV
Min
Typ
Max
Min
Typ
Max
Input Offset Voltage (Note 2)
TA = 25
°
C
Tlow
≤
TA
≤
Thigh
Input Offset Current
TA = 25
°
C
Tlow
≤
TA
≤
Thigh
Input Bias Current (Note 3)
TA = 25
°
C
Tlow
≤
TA
≤
Thigh
Input Common Mode Voltage Range (Note 3)
TA = 25
°
C
Tlow
≤
TA
≤
Thigh
Voltage Gain
RL
≥
15 k
, VCC = 15 Vdc, TA = 25
°
C
Large Signal Response Time
Vin = TTL Logic Swing, Vref = 1.4 Vdc
VRL = 5.0 Vdc, RL = 5.1 k
, TA = 25
°
C
Response Time (Note 5)
VRL = 5.0 Vdc, RL = 5.1 k
, TA = 25
°
C
Input Differential Voltage (Note 6)
All Vin
≥
Gnd or V– Supply (if used)
Output Sink Current
Vin
≥
1.0 Vdc, Vin+ = 0 Vdc, VO
≤
1.5 Vdc TA = 25
°
C
Output Saturation Voltage
Vin
≥
1.0 Vdc, Vin+ = 0, ISink
≤
4.0 mA, TA = 25
°
C
Tlow
≤
TA
≤
Thigh
Output Leakage Current
Vin– = 0 V, Vin+
≥
1.0 Vdc, VO = 5.0 Vdc, TA = 25
°
C
Vin– = 0 V, Vin+
≥
1.0 Vdc, VO = 30 Vdc,
Tlow
≤
TA
≤
Thigh
Supply Current
RL =
∞
Both Comparators, TA = 25
°
C
RL =
∞
Both Comparators, VCC = 30 V
*Tlow = 0
°
C, Thigh = +70
°
C for LM393/393A
LM293 Tlow = –25
°
C, Thigh = +85
°
C
LM2903 Tlow = –40
°
C, Thigh = +105
°
C
LM2903V Tlow = –40
°
C, Thigh = +125
°
C
NOTES:
2.At output switch point, VO
3.Due to the PNP transistor inputs, bias current will flow out of the inputs. This current is essentially constant, independent of the output state, there
fore, no loading changes will exist on the input lines.
5.Response time is specified with a 100 mV step and 5.0 mV of overdrive. With larger magnitudes of overdrive faster response times are obtainable.
6.The comparator will exhibit proper output state if one of the inputs becomes greater than VCC, the other input must remain within the common mode
range. The low input state must not be less than –0.3 V of ground or minus supply.
–
–
±
1.0
–
±
5.0
9.0
–
–
±
2.0
9.0
±
7.0
15
IIO
nA
–
–
±
5.0
–
±
50
±
150
–
–
±
5.0
±
50
±
50
±
200
IIB
nA
–
–
25
–
250
400
–
–
25
200
250
500
VICR
V
0
0
–
–
VCC –1.5
VCC –2.0
–
0
0
–
–
VCC –1.5
VCC –2.0
–
AVOL
50
200
25
200
V/mV
–
–
300
–
–
300
–
ns
tTLH
–
1.3
–
–
1.5
–
μ
s
VID
–
–
VCC
–
–
VCC
V
ISink
6.0
16
–
6.0
16
–
mA
VOL
mV
–
–
150
–
400
700
–
–
–
400
700
200
IOL
nA
–
0.1
–
–
0.1
–
–
–
1000
–
–
1000
ICC
mA
–
–
0.4
–
1.0
2.5
–
–
0.4
–
1.0
2.5
1.4 Vdc, RS = 0
with VCC from 5.0 Vdc to 30 Vdc, and over the full input common mode range (0 V to VCC = –1.5 V).
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