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參數(shù)資料
| 型號： | LM27952SDX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | White LED Adaptive 1.5X/1X Switched Capacitor Current Driver |
| 中文描述： | LED DISPLAY DRIVER, PDSO14 |
| 封裝： | 4 X 3 MM, 0.80 MM HEIGHT, LLP-14 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 521K |
| 代理商： | LM27952SDX |
Electrical Characteristics
(Notes 2, 7)
(Continued)
Limits in standard typeface are for T
= 25C, and limits in
boldface
type apply over the full operating junction temperature
range (-40C to +85 C). Unless otherwise noted, specifications apply to the LM27952 Typical Application Circuit (pg.1) with V
IN
= 3.6V, V(EN) = 1.8V, V(PWM) = 1.8V, 4 LEDs, V
DX
= 0.45V, C
IN
= C
OUT
= 3.3μF, C
1
= C
2
= 1μF, R
SET
= 12.5k
(Note 8)
Symbol
Parameter
Conditions
I
IH
Logic Input High Current
Input Pin: PWM
V(PWM) = 1.8V
Input Pin: EN
V(EN) = 1.8V (Note 11)
I
IL
Logic Input Low Current
Input Pins: EN, PWM
V(EN, PWM) = 0V
R
OUT
Charge Pump Output
Resistance (Note 12)
V
GDX
1x to 3/2x Gain Transition
Voltage Threshold on V
DX
t
ON
Startup Time
I
DX
= 90% steady state
Min
Typ
10
Max
Units
nA
12
μA
10
nA
3.3
V
DX
Falling
450
mV
330
μs
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pin.
Note 3:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
=150C (typ.) and disengages at T
J
=
140C (typ.).
Note 4:
The Human-body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin.
Note 5:
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operation junction temperature (T
= 115
o
C), the maximum power
dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the part/package in the application (
θ
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
- (
θ
JA
D-MAX
).
Note 6:
Junction-to-ambient thermal resistance (
θ
JA
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2 x 1 array of thermal vias. The ground plane on the board
is 50mm x 50mm. Thickness of copper layers are 36μm/18μm /18μm/36μm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22C, still air. Power
dissipation is 1W.
The value of
θ
JA
of the LM27952 in LLP-14 could fall in a range as wide as 45
o
C/W to 150
o
C/W (if not wider), depending on PWB material, layout, and environmental
conditions. In applications where high maximum power dissipation exists (high V
IN
, high I
OUT
), special care must be paid to thermal dissipation issues. For more
information on these topics, please refer to
Application Note 1187: Leadless Leadframe Package (LLP)
and the
Power Efficiency and Power Dissipation
section of this datasheet..
Note 7:
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8:
C
IN
, C
OUT
, C
1
, C
2
: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
Note 9:
LED Current Matching is based on two calculations: [(I
MAX
- I
AVG
) ÷ I
AVG
] and [(I
AVG
- I
MIN
) ÷ I
AVG
]. I
MAX
and I
MIN
are the highest and lowest respective
Dx currents, and I
AVG
is the average Dx current of all four current sinks. The largest number of the two calculations (worst case) is considered the matching figure
for the part. The typical specification provided is the most likely norm of the matching figure for all parts.
Note 10:
Headroom Voltage = V
DX
to GND. If headroom voltage requirement is not met, LED current regulation will be compromised.
Note 11:
EN Logic Input High Current (I
IH
) is due to a 150k
(typ.) pull-down resistor connected internally between the EN and GND pins.
Note 12:
The open loop output resistance (R
OUT
) models all voltage losses in the charge pump. R
OUT
can be used to estimate the voltage at the charge pump
output V
OUT
and the maximum current capability of the device under low V
IN
and high I
OUT
conditions, beyond what is specified in the electrical specifications table:
V
OUT
= (G x V
IN
) - (R
OUT
x I
OUT
). In the equation, G is the charge pump gain mode, and I
OUT
is the total output current (sum of all active Dx current sinks and all
current drawn from V
OUT
).
Note 13:
Turn-on time is measured from when the EN signal is pulled high until the output voltage on V
OUT
crosses 90% of its final value.
L
www.national.com
4
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