參數資料
型號: LM2681MDA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHED CAPACITOR CONVERTER, 160 kHz SWITCHING FREQ-MAX, UUC
封裝: DIE
文件頁數: 8/11頁
文件大小: 234K
代理商: LM2681MDA
Application Information (Continued)
Capacitor Selection
As discussed in the
Positive Voltage Doubler section, the
output resistance and ripple voltage are dependent on the
capacitance and ESR values of the external capacitors. The
output voltage drop is the load current times the output resis-
tance, and the power efficiency is
Where I
Q(V+) is the quiescent power loss of the IC device,
and I
L
2R
out is the conversion loss associated with the switch
on-resistance, the two external capacitors and their ESRs.
The selection of capacitors is based on the specifications of
the dropout voltage (which equals I
out Rout), the output volt-
age ripple, and the converter efficiency. Low ESR capacitors
(Table 1) are recommended to maximize efficiency, reduce
the output voltage drop and voltage ripple.
Low ESR Capacitor Manufacturers
Manufacturer
Phone
Capacitor Type
Nichicon Corp.
(708)-843-7500
PL & PF series, through-hole aluminum electrolytic
AVX Corp.
(803)-448-9411
TPS series, surface-mount tantalum
Sprague
(207)-324-4140
593D, 594D, 595D series, surface-mount tantalum
Sanyo
(619)-661-6835
OS-CON series, through-hole aluminum electrolytic
Murata
(800)-831-9172
Ceramic chip capacitors
Taiyo Yuden
(800)-348-2496
Ceramic chip capacitors
Tokin
(408)-432-8020
Ceramic chip capacitors
Other Applications
Paralleling Devices
Any number of LM2681s can be paralleled to reduce the out-
put resistance. Each device must have its own pumping ca-
pacitor C
1, while only one output capacitor Cout is needed as
shown in Figure 3. The composite output resistance is:
Cascading Devices
Cascading the LM2681s is an easy way to produce a greater
voltage (A two-stage cascade circuit is shown in Figure 4).
The effective output resistance is equal to the weighted sum
of each individual device:
R
out = 1.5Rout_1 +Rout_2
Note that, the increasing of the number of cascading stages
is pracitically limited since it significantly reduces the effi-
ciency, increases the output resistnace and output voltage
ripple.
DS100965-19
FIGURE 3. Lowering Output Resistance by Paralleling Devices
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