參數(shù)資料
型號： LM2623LDX
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 穩(wěn)壓器
英文描述： General Purpose, Gated Oscillator Based, DC/DC Boost Converter
中文描述： 1.2 A SWITCHING REGULATOR, 2000 kHz SWITCHING FREQ-MAX, DSO14
封裝： LLP-14
文件頁數(shù)： 4/11頁
文件大小： 216K
代理商： LM2623LDX
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 1)
SW Pin Voltage
BOOT, V
DD
, EN and FB Pins
FREQ Pin
T
Jmax
(Note 2)
Storage Temperature Range
Lead Temp. (Soldering, 5 sec)
Power Dissipation (T
A
=25C)
(Note 2)
0.5 V to 14.5V
0.5V to 10V
100μA
150C
65C to +150C
260C
500mW
ESD Rating (Note 3)
2kV
Operating Conditions
(Note 1)
V
DD
Pin
FB, EN Pins
BOOT Pin
Ambient Temperature (T
A
)
3V to 5V
0 to V
DD
0 to 10V
40C to +85C
Electrical Characteristics
Limits in standard typeface are for T
J
= 25C, and limits in
boldface
type apply over the full operating temperature range of
40C to +85C. Unless otherwise specified: V
DD
= V
OUT
= 3.3V.
Symbol
Parameter
Condition
V
DD_ST
Start-Up Supply Voltage 25C
I
LOAD
= 0mA (Note 4)
V
IN_OP
Minimum Operating Supply
Voltage (once started)
V
FB
FB Pin Voltage
V
OUT_MAX
Maximum Output Voltage
η
Efficiency
V
IN
= 3.6V; V
OUT
= 5V; I
LOAD
=
500mA
V
IN
= 2.5V; V
OUT
= 3.3V; I
LOAD
= 200mA
D
Switch Duty Cycle
I
DD
Operating Quiescent Current
(Note 5)
I
SD
Shutdown Quiescent Current
(Note 6)
5.0V; EN Pin
<
200mV
I
CL
Switch Peak Current Limit
LM2623A
I
C
Switch Peak Current Limit
LM2623
R
DS_ON
MOSFET Switch On
Resistance
θ
JA
Thermal Resistance
MM Package, Junction to
Ambient(Note 2)
θ
JA
Thermal Resistance
LLP Package, Junction to
Ambient(Notes 2, 8)
θ
JA
Thermal Resistance
LLP Package, Junction to
Ambient(Notes 2, 9)
Enable Section
V
EN_LO
EN Pin Voltage Low (Note 7)
V
EN_HI
EN Pin Voltage High (Note 7)
Typ
Min
Max
1.1
.8
Units
V
V
I
LOAD
= 0mA
0.65
1.24
14
1.2028
1.2772
V
V
87
%
87
17
80
%
μA
FB Pin
>
1.3V; EN Pin at V
DD
110
V
DD
, BOOT and SW Pins at
0.01
2.5
μA
2. 85
2.2
1.2
A
A
0.17
0.26
240
C/W
40
C/W
56
C/W
0.15V
DD
V
V
0.7V
DD
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
outside of its rated operating conditions.
Note 2:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
(maximum junction temperature),
θ
JA
(junction to
ambient thermal resistance), and T
(ambient temperature). The maximum allowable power dissipation at any temperature is P
dmax
= (T
jmax
- T
A
)/
θ
JA
or the number
given in the Absolute Maximum Ratings, whichever is lower.
Note 3:
The human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin. For Pin 8 (SW) the ESD rating is 1.0 kV.
Note 4:
V
tied to Boot and EN pins. Frequency pin tied to V
DD
through 121K resistor. V
DD_ST
= V
DD
when startu-up occurs. V
IN
is V
DD
+ D1 voltage (usually
10-50 mv at start-up)
Note 5:
This is the current into the V
DD
pin.
Note 6:
This is the total current into pins V
DD
, BOOT, SW and FREQ.
Note 7:
When the EN pin is below V
EN_LO
, the regulator is shut down; when it is above V
EN_HI
, the regulator is operating.
L
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