參數(shù)資料
型號(hào): LM201AP
廠商: Texas Instruments, Inc.
英文描述: HIGH-PERFORMANCE OPERATIONAL AMPLIFIERS
中文描述: 高性能運(yùn)算放大器
文件頁(yè)數(shù): 1/7頁(yè)
文件大小: 71K
代理商: LM201AP
LM101A, LM201A, LM301A
HIGH-PERFORMANCE OPERATIONAL AMPLIFIERS
D961, OCTOBER 1979 – REVISED SEPTEMBER 1990
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1991, Texas Instruments Incorporated
2–1
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
Low Input Currents
Low Input Offset Parameters
Frequency and Transient Response
Characteristics Adjustable
Short-Circuit Protection
Offset-Voltage Null Capability
No Latch-Up
Wide Common-Mode and Differential
Voltage Ranges
Same Pin Assignments as uA709
Designed to be Interchangeable with
National Semiconductor LM101A and
LM301A
description
The LM101A, LM201A, and LM301A are high-
performance operational amplifiers featuring very
low input bias current and input offset voltage and
current to improve the accuracy of high-
impedance circuits using these devices. The high
common-mode input voltage range and the
absence of latch-up make these amplifiers ideal
for voltage-follower applications. The devices are
protected to withstand short circuits at the output.
The external compensation of these amplifiers
allows the changing of the frequency response
(when the closed-loop gain is greater then unity)
for applications requiring wider bandwidth or
higher slew rate. A potentiometer may be
connected between the offset-null inputs (N1 and
N2), as shown in Figure 7, to null out the offset
voltage.
The LM101A is characterized for operation over
the full military temperature range of –55
°
C to
125
°
C, the LM201A is characterized for operation
from –25
°
C to 85
°
C, and the LM301A is
characterized for operation from 0
°
C to 70
°
C.
symbol
Output
N2
N1/
COMP
Noninverting
Input IN+
Inverting
Input IN–
+
1
2
3
4
8
7
6
5
N1/COMP
IN–
IN+
V
CC–
COMP
V
CC+
OUT
OFFSET N2
D, JG, OR P PACKAGE
(T0P VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
NC
N1/COMP
IN–
IN+
V
CC–
NC
NC
NC
COMP
V
CC+
OUT
OFFSET N2
NC
LM101A
W FLAT PACKAGE
(T0P VIEW)
1
2
3
4
5
10
9
8
7
6
NC
N1/COMP
IN–
IN+
V
CC–
NC
COMP
V
CC+
OUT
OFFSET N2
LM101A
U FLAT PACKAGE
(T0P VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
V
CC+
NC
OUT
NC
NC
IN–
NC
IN+
NC
LM101A
FK CHIP-CARRIER PACKAGE
(T0P VIEW)
N
N
N
N
N
C
N
N
V
N
NC – No internal connection
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