參數(shù)資料
型號: LM20144
廠商: National Semiconductor Corporation
英文描述: 4A, PowerWise㈢ Adjustable Frequency Synchronous Buck Regulator
中文描述: 第4A,頻率可調(diào)的PowerWise㈢同步降壓穩(wěn)壓器
文件頁數(shù): 14/20頁
文件大小: 744K
代理商: LM20144
30030613
FIGURE 4. LM20144 Loop Compensation
The power stage transfer function is dictated by the modula-
tor, output LC filter, and load; while the feedback transfer
function is set by the feedback resistor ratio, error amp gain,
and external compensation network.
To achieve a -20dB/decade slope, the error amplifier zero,
located at f
Z(EA)
, should positioned to cancel the output filter
pole (f
). An additional error amp pole, located at f
,
can be added to cancel the output filter zero at f
. Can-
cellation of the output filter zero is recommended if larger
value, non-ceramic output capacitors are used.
Compensation of the LM20144 is achieved by adding an RC
network as shown in
Figure 5
below.
30030614
FIGURE 5. Compensation Network for LM20144
A good starting value for C
for most applications is 4.7 nF.
Once the value of C
C1
is chosen the value of RC should be
calculated using the equation below to cancel the output filter
pole (f
P(FIL)
) as shown in
Figure 4
.
A higher crossover frequency can be obtained, usually at the
expense of phase margin, by lowering the value of C
C1
and
recalculating the value of R
. Likewise, increaseing C
and
recalculating R
will provide additional phase margin at a
lower crossover frequency. As with any attempt to compen-
sate the LM20144 the stability of the system should be verified
for desired transient droop and settling time.
If the output filter zero, f
approaches the crossover fre-
quency (F
), an additional capacitor (C
) should be placed
at the COMP pin to ground. This capacitor adds a pole to
cancel the output filter zero assuring the crossover frequency
will occur before the double pole at f
/2 degrades the phase
margin. The output filter zero is set by the output capacitor
value and ESR as shown in the equation below.
If needed, the value for C
C2
should be calculated using the
equation shown below.
Where R
is the output capacitor series resistance and
R
C1
is the calculated compensation resistance.
AVIN FILTERING COMPONENTS (C
F
and R
F
)
To prevent high frequency noise spikes from disturbing the
sensitive analog circuitry connected to the AVIN and AGND
pins, a high frequency RC filter is required between PVIN and
AVIN. These components are shown in
Figure 2
. as C
and
R
. The required value for R
is 1
. C
must be used. Rec-
ommended value of C
is 1.0 μF. The filter capacitor, C
F
should be placed as close to the IC as possible with a direct
connection from AVIN to AGND. A good quality X5R or X7R
ceramic capacitor should be used for C
F
.
SUB-REGULATOR BYPASS CAPACITOR (C
VCC
)
The capacitor at the VCC pin provides noise filtering and sta-
bility for the internal sub-regulator. The recommended value
of C
should be no smaller than 1 μF and no greater than
10 μF. The capacitor should be a good quality ceramic X5R
or X7R capacitor. In general, a 1 μF ceramic capacitor is rec-
ommended for most applications.
SETTING THE START UP TIME (C
SS
)
The addition of a capacitor connected from the SS pin to
ground sets the time at which the output voltage will reach the
final regulated value. Larger values for C
will result in longer
start up times.
Table 3
, shown below provides a list of soft
start capacitors and the corresponding typical start up times.
TABLE 3. Start Up Times for Different Soft-Start
Capacitors
Start Up Time (ms)
C
SS
(nF)
none
33
68
100
120
1
5
10
15
20
www.national.com
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