參數(shù)資料
型號(hào)： LM12458MEL/883
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： ADC
英文描述： PROPRIETARY METHOD ADC, PQCC44
封裝： EL44A
文件頁數(shù)： 17/43頁
文件大小： 991K
代理商： LM12458MEL/883
2.0 Internal User-Programmable Registers (Continued)
A4
A3
A2
A1
Purpose
Type
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
Instruction
RAM
R/W
Acquisition
Watch-
V
IN
V
IN+
0
to
(RAM
Pointer
=
00)
Time
dog
8/12
Timer
Sync
(MUXOUT)
(MUXOUT+)
Pause
Loop
11
1
(Note
20)
(Note
20)
0
Instruction
RAM
R/W
0
to
(RAM
Pointer
=
01)
Don’t
Care
>
/<
Sign
Limit
#
1
11
1
0
Instruction
RAM
R/W
0
to
(RAM
Pointer
=
10)
Don’t
Care
>
/<
Sign
Limit
#
2
11
1
0
Configuration
R/W
Don’t
Care
DIAG
Test
RAM
I/O
Auto
Chan
Stand-
Full
Auto-
Reset
Start
Register
(Note
21)
=
0
Pointer
Sel
Zero
ec
Mask
by
CAL
Zero
Interrupt
Enable
R/W
Number
of
Conversions
Sequencer
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
1
0
1
Register
in
Conversion
FIFO
Address
to
Generate
INT2
Generate
INT1
Address
R
Actual
Number
of
INST7
INST6
INST5
INST4
INST3
INST2
INST1
INST0
1
0
1
0
Interrupt
Status
Conversion
Results
Sequencer
Register
in
Conversion
FIFO
Instruction
being
Executed
1
0
1
Timer
R/W
Timer
Preset
High
Byte
Timer
Preset
Low
Byte
Register
1
0
Conversion
R
Address
Sign
Conversion
Data:
LSBs
FIFO
or
Sign
Data:
MSBs
1
0
1
Limit
Status
R
Limit
#
2:
Status
Limit
#
1:
Status
Register
Note
20:
LM12454
(Refer
to
T
able
2
).
Note
21:
LM12(H)458
only
.
Must
be
set
to
“0”
for
the
LM12454.
FIGURE
13.
LM12(H)454/8
Memory
Map
for
16-Bit
W
ide
Databus
(BW
=
“0”,
T
est
Bit
=
“0”
and
A0
=
Don’t
Care)
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