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    參數(shù)資料
    型號(hào): LKP5661-5ERD3
    元件分類: 電源模塊
    英文描述: 2-OUTPUT 250 W AC-DC PWR FACTOR CORR MODULE
    封裝: HEAT SINK, METAL, CASE K02, MODULE
    文件頁(yè)數(shù): 2/23頁(yè)
    文件大小: 534K
    代理商: LKP5661-5ERD3
    Cassette Style
    AC-DC Converters
    KP Series
    Edition 01/01.2001
    10/23
    Battery Charging/Temperature Sensor
    The LKP 5740-6R, LKP 5741-5R, LKP 5742-7R are in-
    tended for lead acid battery charger applications. For an
    optimum battery charging and life expectancy of the battery
    an external temperature sensor may be connected to the
    R-input. The sensor is mounted as close as possible to the
    battery pole and adjusts the output voltage of the LKP unit
    according to the temperature of the battery (which is related
    to the load of the battery and the ambient temperature).
    Depending on the cell voltage and the temperature coeffi-
    cient of the battery, different sensor types are available.
    For more information please ask Power-One.
    Fig. 17
    Dependance of output voltage vs. temperature for defined
    temperature coefficient.
    2.10
    2.15
    2.20
    2.25
    2.30
    2.35
    2.40
    Cell voltage [V]
    0
    5
    10
    15
    20
    25
    30
    35
    40
    45
    50
    [
    °C]
    06123
    Uo max
    Uz = 2.27 V, –3.5 mV/K
    Uz = 2.23 V, –3.5 mV/K
    Uo nom
    0
    t
    0
    Inhibit
    1
    0.1
    1
    Uo/Uo nom
    tr
    tf
    06001
    Table 5: Inhibit characteristics
    Characteristic
    Conditions
    min
    typ
    max Unit
    Uinh Inhibit
    Uo = on
    Ui min…Ui max
    –50
    0.8
    V
    voltage
    Uo = off
    2.4
    50
    Iinh
    Inhibit current
    Uinh = 0
    –400
    A
    tr
    Rise time
    30
    ms
    tf
    Fall time
    depending on
    Io
    Fig. 16
    Output response as a function of inhibit control
    Auxiliary Functions
    i Inhibit for Remote On and Off
    Note: With open i input: Output is disabled (
    Uo = off).
    The outputs of the module may be enabled or disabled by
    means of a logic signal (TTL, CMOS, etc.) applied between
    the inhibit input i and the negative pin of output 1 (Vo1–). In
    systems with several units, this feature can be used, for ex-
    ample, to control the activation sequence of the converters.
    If the inhibit function is not required, connect the inhibit pin
    18 to pin 14 to enable the outputs (active low logic, fail
    safe). For output response refer to:
    Hold-up Time and Out-
    put Response.
    Vi+
    Vi–
    Vo–
    i
    Vo+
    Iinh
    Uinh
    06031
    1.6
    0.8
    0
    –0.8
    –50
    Uinh [V]
    Iinh [mA]
    –30
    0
    –10
    10
    30
    50
    2.0
    1.2
    0.4
    –0.4
    Uinh = 0.8 V
    Uo = on
    Uo = off
    Uinh = 2.4 V
    06032
    Fig. 14
    Definition of Uinh and Iinh.
    Fig. 15
    Typical inhibit current Iinh versus inhibit voltage Uinh
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