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參數(shù)資料
| 型號(hào)： | LiDrAFE |
| 廠商： | SIEMENS AG |
| 英文描述： | ADSL Analog Front End Line Driver(非對(duì)稱(chēng)數(shù)字用戶線（ADSL）線驅(qū)動(dòng)器) |
| 中文描述： | ADSL模擬前端線驅(qū)動(dòng)器（非對(duì)稱(chēng)數(shù)字用戶線（ADSL線路）線驅(qū)動(dòng)器） |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大小： | 616K |
| 代理商： | LIDRAFE |
I
Maximum signal level at Line
Driver output: 16 V peak-to-
peak differential
I
Anti-imaging filter with program-
mable cutoff frequency (150kHz
/300kHz) and on-chip tuning
I
Up to 15 dB programmable gain
for power cutback
P
R O D U C T
B
R I E F
N e v e r s t o p t h i n k i n g .
L i D r A F E
Integrated Analog Frontend & Linedriver
for ADSL Full Rate & Lite
Applications
I
Internal / external ADSL
modems (datapump or host
software based)
I
Routers / IADs / Smart NTs
Features
I
Supports G.992.1 (ITU G.dmt),
G.992.2 (G.Lite), DTS 06006
(ETSI ADSL over ISDN) for
ADSL CPE applications
I
Power dissipation 800mW
(Issue 2 mode including Line
Driver)
I
Flexible power down mode
I
Integrated wake up function
I
Various test loops supported
I
Integrated functions provide
analog echocancelling
I
Integrated digitally controlled
XO for modem timing recovery
I
Versatile data interface to ADSL
datapump with the following
modes
- 4 bit nibble (to PEB22713/4)
- 1 bit serial
- 16 bit parallel
- 14/12 bit parallel
I
4 pin serial control interface for
register access
I
4 general purpose I/O pins
I
3.3 V supply for AFE and inter-
faces
I
Single +12 V supply for Line
Driver
Transmit Path
I
High resolution multibit Sigma
Delta DAC (14 bit)
I
Integrated Line Driver capable
to drive +13 DBm onto the line
using a 1:1.8 transformer
I
Very low noise and distortion
Receive Path
I
2 step Automatic Gain Control
(AGC) up to 36 dB dynamic
range
I
Programmable Analog Channel
Equalizer (ACE)
I
High resolution multibit Sigma
Delta ADC (14 bit)
I
Very low noise and distortion
The LiDrAFE chip is a highly integrated solution
that incorporates the Analog Front-End, Line
Driver and other peripheral components into a
single chip for ADSL CPE applications. It is the
result of Infineon’s leading edge mixed signal
technology combined with advanced CMOS fabri-
cation process.
LiDrAFE offers multiple interface options to allow
easy connection to different ADSL datapumps. Its
smart architecture and high integration makes it
an extremely cost efficient solution requiring min-
imal external components. It uses high perfor-
mance multi-bit sigma-delta ADC and DAC and
advanced proprietary signal processing tech-
niques to offer very low noise and distortion sig-
nal path from the tip/ring to the ADSL datapump
Flexibility, best of class performance and cost
effectiveness makes LiDrAFE an ideal front-end
solution for the highly competitive ADSL market-
place.
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