參數(shù)資料
型號(hào): LH79520
英文描述: ARM RISC CORE ASSPs ARM720T
中文描述: ARM的RISC核心ASSP的ARM720T
文件頁(yè)數(shù): 20/39頁(yè)
文件大?。?/td> 296K
代理商: LH79520
LH79520
System-on-Chip
20
8/21/02
Preliminary Data Sheet
Real Time Clock
The RTC can provide a basic alarm function or long
time base counter. This is achieved by generating an
interrupt signal after counting for a programmed num-
ber of cycles of RTC input. Counting in one-second
intervals is achieved by the use of a 1 Hz clock input to
the RTC.
The features of the RTC are:
32-bit up counter with programmable load
Programmable 32-bit match compare register
Software maskable interrupt when counter and com-
pare registers are identical.
RTC input clock sources:
PLL clock
32.768 kHz clock
1 Hz clock (default).
Watchdog Timer
The Watchdog Timer provides hardware protection
against malfunctions. It is a programmable timer to be
reset by software at regular intervals. Failure to reset
the timer will cause a FIQ interrupt. Failure to service
the FIQ interrupt will then generate a System Reset.
The features of the Watchdog Timer are:
Driven by the bus clock
16 programmable time-out periods: 2
16
through 2
31
clock cycles
Generates a system reset (resets LH79520) or a FIQ
Interrupt whenever a time-out period is reached
Software enable, lockout, and counter-reset mecha-
nisms add security against inadvertent writes
Protection mechanism guards against interrupt-ser-
vice failure:
– The first WDT time-out triggers FIQ and asserts
nWDFIQ status flag
– If FIQ service routine fails to clear nWDFIQ, then
the next WDT time-out triggers a soft reset.
Timer
The LH79520 incorporates two Timer modules,
each comprising two 16-bit independently programma-
ble timers. This gives a total of four independent timers.
Each timer has two operating modes:
– Free-running mode: After reaching 0x0000 the
timer wraps around to 0xFFFF and generates an
interrupt request. It continues to count down from
0xFFFF.
– Periodic timer mode: After reaching 0x0000 the
timer is automatically reloaded with its pro-
grammed value and generates an interrupt re-
quest. It continues to count down from the
loaded value.
Each timer contains a programmable pre-scaler:
– Bus clock divided by 1, 16, or 256
Timers can be cascaded to achieve longer timing
periods
Carry-out of higher-order timer provides clock signal
for next lower order timer
Possible timing ranges:
– 2
15
(single timer)
– 2
31
(two timers cascaded)
– 2
47
(three timers cascaded)
– 2
63
(four timers cascaded)
Output signal of lowest order timer is externally avail-
able as CTOUT1B signal.
Input/Output Configuration System
The registers provided by the IOCON System allow
the user to directly control the pin multiplexing of the
device; by setting or clearing bits in a set of registers,
the user can configure the LH79520 for peripheral
devices.
General Purpose Input/Output (GPIO)
The LH79520 provides up to 64 bits of programma-
ble input/output. These eight 8-bit ports are Ports A
through H, and are multiplexed with other signals.
Individually programmable input/output pins
All I/O ports default to Input on power-up.
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