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參數(shù)資料
| 型號： | LH543601M-25 |
| 廠商： | Sharp Corporation |
| 英文描述： | 256 x 36 x 2 Bidirectional FIFO |
| 中文描述： | 256 × 36 × 2雙向先進先出 |
| 文件頁數(shù)： | 40/43頁 |
| 文件大?。?/td> | 360K |
| 代理商： | LH543601M-25 |
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TIMING DIAGRAMS (cont’d)
t
RQS
t
ACK
t
AE
t
ACK
t
ACK
t
ACK
(CK )
(R/W )
(REQ )
(ACK )
(AE
1
)
A
CK
A
R/W
A
REQ
A
ACK
AE
2
RWS
t
Starting at the third cycle after entering the
'almost-empty' region, acknowledge
occurs on every third cycle to prevent underrun
of the empty condition.
Outside the 'almost-empty' region,
acknowledge is continuous
for a continuous request.
Indicates where a read would take place, if ACK were tied to EN.
3. REQ must be maintained HIGH throughout the entire clock cycle for ACK to be generated.
4. When the REQ/ACK handshake is not used, ACK can be ignored,
and REQ may be tied HIGH or used as a second enable.
5. Parameters without parentheses apply to Port A. Parameters with parentheses apply to Port B.
NOTES:
1. For a FIFO access to occur, REQ and EN must be held HIGH for the required setup and hold times.
2. ACK can be tied directly to EN to directly gate FIFO accesses.
*
*
*
*
*
543601-9
1
2
Figure 31. Read Request/Acknowledge Handshake
LH543601
256
×
36
×
2 Bidirectional FIFO
40
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH543601M-30 | 256 x 36 x 2 Bidirectional FIFO |
| LH543601M-35 | 256 x 36 x 2 Bidirectional FIFO |
| LH543601P-20 | 256 x 36 x 2 Bidirectional FIFO |
| LH543601P-25 | 256 x 36 x 2 Bidirectional FIFO |
| LH543601P-30 | 256 x 36 x 2 Bidirectional FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH543601M-30 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:256 x 36 x 2 Bidirectional FIFO |
| LH543601M-35 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:256 x 36 x 2 Bidirectional FIFO |
| LH543601P-20 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:256 x 36 x 2 Bidirectional FIFO |
| LH543601P-25 | 制造商:Sharp Microelectronics Corporation 功能描述: 制造商:Sharp Microelectronics Corporation 功能描述:512 X 36 BI-DIRECTIONAL FIFO, PQFP132 |
| LH543601P-30 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:256 x 36 x 2 Bidirectional FIFO |
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