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參數(shù)資料
| 型號(hào)： | LH52256C |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 256K (32K x 8) Static RAM |
| 中文描述： | 的CMOS 256K（32K的× 8）靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 97K |
| 代理商： | LH52256C |
WRITE CYCLE (T
A
= 0
°
C to +70
°
C, V
CC
= 4.5 V to 5.5 V)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
NOTE
Write cycle time
t
WC
70
ns
CE Low to end of write
t
CW
45
ns
Address valid to end of write
t
AW
45
ns
Address setup time
t
AS
0
ns
Write pulse width
t
WP
35
ns
Write recovery time
t
WR
0
ns
Input data setup time
t
DW
30
ns
Input data hold time
t
DH
0
ns
WE High to output active
t
OW
5
ns
1
WE Low to output in High
impedance
t
WZ
0
30
ns
1
OE High to output in High
impedance
t
OHZ
0
30
ns
1
NOTE:
1.
Active output to high-impedance and high-impedance to output active tests specified for a
±
200 mV
transition from steady state levels into the test load.
CAPACITANCE (T
A
= 25
°
C, f = 1MHz)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
Input capacitance
C
IN
V
IN
= 0 V
7
pF
1
I/O capacitance
C
I/O
V
I/O
= 0 V
10
pF
1
NOTE:
1.
This parameter is sampled and not production tested.
DATA RETENTION CHARACTERISTICS (T
A
= 0
°
C to +70
°
C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
Data retention supply voltage
V
CCDR
CE
≥
V
CCDR
– 0.2 V
2.0
5.5
V
Data retention supply current
I
CCDR
V
CCDR
= 3.0 V
CE
≥
V
CCDR
– 0.2 V
T
A
= 25
°
C
0.3
1.0
μ
A
TA = 40
°
C
3.0
15
Chip enable setup time
t
CDR
0
ns
Chip enable hold time
t
R
t
RC
ns
1
NOTE:
1.
2.
t
RC
= Read cycle time.
Typical values at T
A
= 25
°
C
CMOS 256K (32K
×
8) Static RAM
LH52256C/CH
5
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|---|---|
| LH52256CH | CMOS 256K (32K x 8) Static RAM |
| LH52258A | CMOS 32K x 8 Static RAM |
| LH525C2T | 256K SRAM |
| LH525C9N | 256K SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH52256C-10LL | 制造商:Sharp Microelectronics 功能描述:SRAM Chip Async Single 5V 256K-Bit 32K x 8 100ns 28-Pin PDIP |
| LH52256C-70LL | 功能描述:IC SRAM 256KBIT 70NS 28DIP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| LH52256CD-10LL | 制造商:Sharp Microelectronics 功能描述:32KX8 SRAM |
| LH52256CD-70LL | 制造商:Sharp Microelectronics 功能描述:SRAM Chip Async Single 5V 256K-Bit 32K x 8 70ns 28-Pin PDIP |
| LH52256CH | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:CMOS 256K (32K x 8) Static RAM |
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