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參數(shù)資料
| 型號： | LH5164AVH |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 64K (8K x 8) Static RAM |
| 中文描述： | 的CMOS 64K的（8K的× 8）靜態(tài)RAM |
| 文件頁數(shù)： | 7/9頁 |
| 文件大小： | 66K |
| 代理商： | LH5164AVH |
DATA VALID
t
DH
t
DW
WE
D
IN
t
CW
t
WC
5164AZ8-5
t
WR
t
CW
t
AW
CE
1
CE
2
t
AS
t
WZ
t
WP
(NOTE 2)
t
WR
(NOTE 3)
D
OUT
(NOTE 5)
(NOTE 1)
t
WR
(NOTE 4)
(NOTE 7)
t
OW
(NOTE 6)
1. The writing occurs during an overlapping period of CE
1
= "LOW," CE
2
= "HIGH," and WE = "LOW" (t
WP
).
2. t
CW
is defined as the time from the last occuring transit, either CE
1
LOW transit or CE
2
HIGH transit,
to the time when the writing is finished.
3. t
AS
is defined as the time from address change to writing start.
4. t
WR
is defined as the time from writing finish to address change.
5. The input signals of opposite phase to the outputs must not be applied while I/O pins are in the output state.
6. If CE
1
LOW transit or CE
2
HIGH transit occurs at the same time or after WE LOW transit, the output will
remain high-impedance.
7. If CE
1
HIGH transit or CE
2
LOW transit occurs at the same time or before WE HIGH transit, the output will
remain high-impedance.
NOTES:
ADDRESS
Figure 5. OE Low Fixed
CMOS 64K (8K
×
8) Static RAM
LH5164AZ8
7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH5164A | CMOS 64K (8K x 8) Static RAM |
| LH5164AH | CMOS 64K (8K x 8) Static RAM |
| LH5168 | CMOS 64K (8LX8) STATIC RAM |
| LH5168-10L | CMOS 64K (8LX8) STATIC RAM |
| LH5168TR-10L | CMOS 64K (8LX8) STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH5164AVHN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5164AVHT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5164AVN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5164AVT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5164AZ8 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:CMOS 64K (8K x 8) Static RAM |
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