參數(shù)資料
型號: LH5164A
廠商: Sharp Corporation
英文描述: CMOS 64K (8K x 8) Static RAM
中文描述: 的CMOS 64K的(8K的× 8)靜態(tài)RAM
文件頁數(shù): 7/11頁
文件大?。?/td> 105K
代理商: LH5164A
DATA VALID
t
DH
t
DW
WE
D
IN
(NOTE 6)
t
CW
A
0
- A
12
OE
t
WC
5164A-4
t
WR
t
CW
t
AW
CE
1
CE
2
t
AS
t
OHZ
t
WP
(NOTE 2)
t
WR
(NOTE 3)
D
OUT
(NOTE 5)
(NOTE 1)
t
WR
HIGH-Z
1. The writing occurs during an overlapping period of CE
1
= 'LOW,' CE
2
= 'HIGH,' and WE = 'LOW' (t
WP
).
2. t
CW
is defined as the time from the last occuring transition, either CE
1
LOW transition or CE
2
HIGH transition,
to the time when the writing is finished.
3. t
AS
is defined as the time from address change to writing start.
4. t
WR
is defined as the time from writing finish to address change.
5. If CE
1
LOW transition or CE
2
HIGH transition occurs at the same time or after WE LOW transition, the
outputs will remain high-impedance.
6. While I/O pins are in the output state, input signals with the opposite logic level must not be applied.
NOTES:
(NOTE 4)
Figure 6. Write Cycle 1
CMOS 64K (8K
×
8) Static RAM
LH5164A/AH
7
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LH5164AH CMOS 64K (8K x 8) Static RAM
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