參數(shù)資料
型號(hào): LH28F800BGR-TL12
廠商: Sharp Corporation
英文描述: 8 M-bit (512 kB x 16) SmartVoltage Flash Memories
中文描述: 8 M位(512 KB的× 16)SmartVoltage閃存
文件頁(yè)數(shù): 24/38頁(yè)
文件大小: 328K
代理商: LH28F800BGR-TL12
LH28F800SU
8M (512K × 16, 1M × 8) Flash Memory
24
AC Characteristics - Read Only Operations
1
(Continued)
T
A
= 0°C to +70°C
SYMBOL
PARAMETER
V
CC
= 5.0 V ± 0.25V
V
CC
= 5.0 V ± 0.5V
UNITS
NOTE
MIN.
MAX.
MIN.
MAX.
t
AVAV
Read Cycle Time
70
80
ns
t
AVEL
Address Setup to CE
Going Low
10
10
ns
3, 4
t
AVGL
Address Setup to OE
Going Low
0
0
ns
3, 4
t
AVQV
Address to Output Delay
70
80
ns
t
ELQV
CE
to Output Delay
70
80
ns
2
t
PHQV
RP
High to Output Delay
400
480
ns
t
GLQV
OE
to Output Delay
30
35
ns
2
t
ELQX
CE
to Output in Low Z
0
0
ns
3
t
EHQZ
CE
to Output in High Z
25
30
ns
3
t
GLQX
OE
to Output in Low Z
0
0
ns
3
t
GHQZ
OE
to Output in High Z
25
30
ns
3
t
OH
Output Hold from Address, CE
or
OE
change, whichever occurs first
0
0
ns
3
t
FLQV
t
FHQV
BYTE to Output Delay
70
80
ns
3
t
FLQZ
BYTE Low to Output in High Z
25
30
ns
3
t
ELFL
t
ELFH
CE
Low to BYTE High or Low
5
5
ns
3
NOTES:
1. See AC Input/Output Reference Waveforms for timing measurements.
2. OE
may be delayed up to t
ELQV
- t
GLQV
after the falling edge of CE
without impact on t
ELQV
.
3. Sampled, not 100% tested.
4. This timing parameter is used to latch the correct BSR data onto the outputs.
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