參數(shù)資料
型號: LH28F640BFHB-PTTL60
英文描述: Flash ROM
中文描述: 閃存ROM
文件頁數(shù): 36/56頁
文件大小: 373K
代理商: LH28F640BFHB-PTTL60
LH28F160S5-L/S5H-L
- 36 -
TEST CONFIGURATION
V
CC
= 5.0±0.25 V
(NOTE 1)
V
CC
= 5.0±0.5 V
NOTE :
1.
Applied to high-speed products, LH28F160S5-L70 and
LH28F160S5H-L70.
CL (pF)
30
100
Test Configuration Capacitance Loading Value
Fig. 12 Transient Input/Output Reference Waveform for V
CC
= 5.0±0.25 V
(High Speed Testing Configuration)
1.5
1.5
3.0
0.0
TEST POINTS
INPUT
OUTPUT
6.2.2 AC INPUT/OUTPUT TEST CONDITIONS
AC test inputs are driven at 3.0 V for a Logic "1" and 0.0 V for a Logic "0". Input timing begins, and output
timing ends, at 1.5 V. Input rise and fall times (10% to 90%) < 10 ns.
Fig. 13 Transient Input/Output Reference Waveform for V
CC
= 5.0±0.5 V
(Standard Testing Configuration)
2.0
0.8
2.0
0.8
2.4
0.45
TEST POINTS
INPUT
OUTPUT
AC test inputs are driven at V
OH
(2.4 V
TTL
) for a Logic "1" and V
OL
(0.45 V
TTL
) for a Logic "0". Input timing
begins at V
IH
(2.0 V
TTL
) and V
IL
(0.8 V
TTL
). Output timing ends at V
IH
and V
IL
. Input rise and fall times (10%
to 90%) < 10 ns.
Fig. 14 Transient Equivalent Testing
Load Circuit
DEVICE
UNDER
TEST
C
L
Includes Jig
Capacitance
R
L
= 3.3 k
C
L
OUT
1.3 V
1N914
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