參數(shù)資料
型號(hào): LH28F008SCHB-L12
英文描述: x8 Flash EEPROM
中文描述: x8閃存EEPROM的
文件頁(yè)數(shù): 8/56頁(yè)
文件大?。?/td> 373K
代理商: LH28F008SCHB-L12
2 PRINCIPLES OF OPERATION
The LH28F160S5-L/S5H-L flash memories include
an on-chip WSM to manage block erase, full chip
erase, (multi) word/byte write and block lock-bit
configuration functions. It allows for : 100% TTL-
level control inputs, fixed power supplies during
block erase, full chip erase, (multi) word/byte write
and block lock-bit configuration, and minimal
processor overhead with RAM-like interface timings.
After initial device power-up or return from deep
power-down mode (see
Table 2.1
and
Table 2.2
"
Bus Operations
"), the device defaults to read
array mode. Manipulation of external memory
control pins allow array read, standby, and output
disable operations.
Status register, query structure and identifier codes
can be accessed through the CUI independent of
the V
PP
voltage. High voltage on V
PP
enables
successful block erase, full chip erase, (multi)
word/byte write and block lock-bit configuration. All
functions associated with altering memory
contents—block erase, full chip erase, (multi)
word/byte write and block lock-bit configuration,
status, query and identifier codes—are accessed
via the CUI and verified through the status register.
Commands are written using standard micro-
processor write timings. The CUI contents serve as
input to the WSM, which controls the block erase,
full chip erase, (multi) word/byte write and block
lock-bit configuration. The internal algorithms are
regulated by the WSM, including pulse repetition,
internal verification, and margining of data.
Addresses and data are internally latched during
write cycles. Writing the appropriate command
outputs array data, accesses the identifier codes,
outputs query structure or outputs status register
data.
Interface software that initiates and polls progress
of block erase, full chip erase, (multi) word/byte
write and block lock-bit configuration can be stored
in any block. This code is copied to and executed
from system RAM during flash memory updates.
After successful completion, reads are again
possible via the Read Array command. Block erase
suspend allows system software to suspend a
block erase to read/write data from/to blocks other
than that which is suspended. Write suspend allows
system software to suspend a (multi) word/byte
write to read data from any other flash memory
array location.
2.1
Depending on the application, the system designer
may choose to make the V
PP
power supply
switchable (available only when block erase, full
chip erase, (multi) word/byte write and block lock-bit
configuration are required) or hardwired to V
PPH1
.
The device accommodates either design practice
and encourages optimization of the processor-
memory interface.
Data Protection
When V
PP
V
PPLK
, memory contents cannot be
altered. The CUI, with multi-step block erase, full
chip erase, (multi) word/byte write and block lock-bit
configuration command sequences, provides
protection from unwanted operations even when
high voltage is applied to V
PP
. All write functions
are disabled when V
CC
is below the write lockout
voltage V
LKO
or when RP# is at V
IL
. The device’s
block locking capability provides additional
protection from inadvertent code or data alteration
by gating block erase, full chip erase and (multi)
word/byte write operations.
LH28F160S5-L/S5H-L
- 8 -
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LH28F008SCHB-L85 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F008SCHB-T12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F008SCHB-T15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F008SCHB-TL12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM
LH28F008SCHB-TL15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM