Figure 2-14. DCS Waveforms sysMEM Memory The LatticeECP/EC devices contain a number of sysMEM" />
參數(shù)資料
型號: LFECP33E-5FN484C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 57/163頁
文件大小: 0K
描述: IC FPGA 32.8KLUTS 360I/O 484-BGA
產(chǎn)品培訓(xùn)模塊: LatticeECP3 Introduction
標(biāo)準(zhǔn)包裝: 60
系列: ECP
邏輯元件/單元數(shù): 32800
RAM 位總計: 434176
輸入/輸出數(shù): 360
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
2-12
Architecture
LatticeECP/EC Family Data Sheet
Figure 2-14. DCS Waveforms
sysMEM Memory
The LatticeECP/EC devices contain a number of sysMEM Embedded Block RAM (EBR). The EBR consists of a 9-
Kbit RAM, with dedicated input and output registers.
sysMEM Memory Block
The sysMEM block can implement single port, dual port or pseudo dual port memories. Each block can be used in
a variety of depths and widths as shown in Table 2-6.
Table 2-6. sysMEM Block Configurations
Bus Size Matching
All of the multi-port memory modes support different widths on each of the ports. The RAM bits are mapped LSB
word 0 to MSB word 0, LSB word 1 to MSB word 1 and so on. Although the word size and number of words for
each port varies, this mapping scheme applies to each port.
RAM Initialization and ROM Operation
If desired, the contents of the RAM can be pre-loaded during device configuration. By preloading the RAM block
during the chip configuration cycle and disabling the write controls, the sysMEM block can also be utilized as a
ROM.
Memory Mode
Configurations
Single Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
256 x 36
True Dual Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
Pseudo Dual Port
8,192 x 1
4,096 x 2
2,048 x 4
1,024 x 9
512 x 18
256 x 36
CLK0
SEL
DCSOUT
CLK1
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