參數(shù)資料
型號(hào)： LFECP33E-3FN672C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 76/163頁
文件大?。?/td> 0K
描述： IC FPGA 32.8KLUTS 496I/O 672-BGA
產(chǎn)品培訓(xùn)模塊： LatticeECP3 Introduction
標(biāo)準(zhǔn)包裝： 40
系列： ECP
邏輯元件/單元數(shù)： 32800
RAM 位總計(jì)： 434176
輸入/輸出數(shù)： 496
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 672-BBGA
供應(yīng)商設(shè)備封裝： 672-FPBGA（27x27）
www.latticesemi.com
1-1
Introduction_01.4
September 2012
Data Sheet
2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Features
Extensive Density and Package Options
1.5K to 32.8K LUT4s
65 to 496 I/Os
Density migration supported
sysDSP Block (LatticeECP Versions)
High performance multiply and accumulate
4 to 8 blocks
4 to 8 36x36 multipliers or
– 16 to 32 18x18 multipliers or
32 to 64 9x9 multipliers
Embedded and Distributed Memory
18 Kbits to 498 Kbits sysMEM Embedded
Block RAM (EBR)
Up to 131 Kbits distributed RAM
Flexible memory resources:
Distributed and block memory
Flexible I/O Buffer
Programmable sysI/O buffer supports wide
range of interfaces:
LVCMOS 3.3/2.5/1.8/1.5/1.2
LVTTL
SSTL 3/2 Class I, II, SSTL18 Class I
HSTL 18 Class I, II, III, HSTL15 Class I, III
PCI
LVDS, Bus-LVDS, LVPECL, RSDS
Dedicated DDR Memory Support
Implements interface up to DDR400 (200MHz)
sysCLOCK PLLs
Up to four analog PLLs per device
Clock multiply, divide and phase shifting
System Level Support
IEEE Standard 1149.1 Boundary Scan, plus
ispTRACY internal logic analyzer capability
SPI boot flash interface
1.2V power supply
Low Cost FPGA
Features optimized for mainstream applications
Low cost TQFP and PQFP packaging
Table 1-1. LatticeECP/EC Family Selection Guide
Device
LFEC1
LFEC3
LFEC6/
LFECP6
LFEC10/
LFECP10
LFEC15/
LFECP15
LFEC20/
LFECP20
LFEC33/
LFECP33
PFU/PFF Rows
12
16
24
32
40
44
64
PFU/PFF Columns
1624
3240485664
PFUs/PFFs
192
384
768
1280
1920
2464
4096
LUTs (K)
1.5
3.1
6.1
10.2
15.4
19.7
32.8
Distributed RAM (Kbits)
6
12
25
41
61
79
131
EBR SRAM (Kbits)
18
55
92
276
350
424
498
EBR SRAM Blocks
2
6
10
30
38
46
54
sysDSP Blocks
1
—
45678
18x18 Multipliers
1
—
16
20
24
28
32
VCC Voltage (V)
1.2
Number of PLLs
2224444
Packages and I/O Combinations:
100-pin TQFP (14 x 14 mm)
67
144-pin TQFP (20 x 20 mm)
97
208-pin PQFP (28 x 28 mm)
112
145
147
256-ball fpBGA (17 x 17 mm)
160
195
484-ball fpBGA (23 x 23 mm)
224
288
352
360
672-ball fpBGA (27 x 27 mm)
400
496
1. LatticeECP devices only.
LatticeECP/EC Family Data Sheet
Introduction
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFECP33E-3FN672I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs 496 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3Q208C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3Q208I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3QN208C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3QN208I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
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