Figure 3-14. sysCONFIG Master Serial Port Timing Figure 3-15. sysCONFI" />
參數(shù)資料
型號: LFEC10E-5QN208C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 124/163頁
文件大?。?/td> 0K
描述: IC FPGA 10.2KLUTS 147I/O 208QFP
標(biāo)準(zhǔn)包裝: 24
系列: EC
邏輯元件/單元數(shù): 10200
RAM 位總計: 282624
輸入/輸出數(shù): 147
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
3-27
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Figure 3-14. sysCONFIG Master Serial Port Timing
Figure 3-15. sysCONFIG Slave Serial Port Timing
Figure 3-16. Power-On-Reset (POR) Timing
CCLK (output)
DIN
DOUT
t
SUMCDI
t
HMCDI
t
CODO
CCLK (input)
DIN
DOUT
t
SUSCDI
t
HSCDI
t
CODO
t
SSCL
t
SSCH
CCLK
2
DONE
VCC/VCCAUX
1
CFG[2:0]
3
t
ICFG
Valid
INITN
t
VMC
t
SUCFG
t
HCFG
1. Time taken from VCC or VCCAUX, whichever is the last to reach its VMIN.
2. Device is in a Master Mode.
3. The CFG pins are normally static (hard wired).
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