參數(shù)資料
型號(hào): LF9502JC25
廠商: LOGIC DEVICES INC
元件分類: 數(shù)字信號(hào)處理外設(shè)
英文描述: 2K Programmable Line Buffer
中文描述: 10-BIT, DSP-PIPELINE REGISTER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 5/7頁
文件大?。?/td> 52K
代理商: LF9502JC25
DEVICES INCORPORATED
5
LF9502
2K Programmable Line Buffer
08/16/2000–LDS.9502-G
Video Imaging Products
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SWITCHING CHARACTERISTICS
C
LOCK
E
NABLE
T
IMING
— CLKSEL LOW
CLK*
t
PW
CLKEN
t
MH
t
ES
t
ES
INTERNAL
CLOCK
L
ENGTH
C
ONTROL
T
IMING
— CLKSEL LOW
CLK*
t
LEH
LCEN
t
MH
t
LES
LC
10-0
t
LS
t
LH
*When CLKSEL is HIGH, assume CLK is inverted.
25
20
Symbol
t
CYC
Parameter
Cycle Time
Min
25
Max
Min
20
Max
t
PW
Clock Pulse Width
10
8
t
DS
Data Input Setup Time
8
6
t
DH
Data Input Hold Time
2
2
t
ES
Clock Enable to Clock Setup Time
8
6
t
EH
Clock Enable to Clock Hold Time
2
2
t
LS
Length Control Input Setup Time
8
6
t
LH
Length Control Input Hold Time
2
2
t
LES
Length Control Enable to Clock Setup Time
8
6
t
LEH
Length Control Enable to Clock Hold Time
2
2
t
MS
Mode Select Setup Time
8
6
t
MH
Mode Select Hold Time
2
2
t
OUT
Clock to Data Out
15
14
t
OH
Output Hold Time
(Note 8)
4
4
t
ENA
Three-State Output Enable Delay
(Note 11)
15
14
t
DIS
Three-State Output Disable Delay
(Note 11)
15
14
C
OMMERCIAL
O
PERATING
R
ANGE
(0°C to +70°C)
Notes 9, 10 (ns)
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