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參數(shù)資料
| 型號(hào)： | LF13508M |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 8-Channel Analog Multiplexer |
| 中文描述： | 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大小： | 334K |
| 代理商： | LF13508M |
Typical Applications
DATA ACQUISITION SYSTEM
A SIMPLIFIED SYSTEM DISCUSSION
Analog multiplexers (MUX) are usually used for multi-chan-
nel Data Acquisition Units (DAU). Figure 5 shows a system
in which 8 different analog inputs are sampled and convert-
ed into digital words for further processing. The sample and
hold circuit is optional, depending on input speed require-
ments and on A/D converter speed.
Parameters characterizing the system are:
System Channels:
The number of multiplexer channels.
Accuracy:
The conversion accuracy of each individual sam-
ple with the system operating at the throughput rate.
Speed or Throughput Rate:
Number of samples/second/
channel the system can handle.
For a discussion on system structure, addressing mode and
processor interfacing, see application note AN-159.
A. ACCURACY CONSIDERATIONS
1. Multiplexer’s Influence on System Accuracy (Figure 6).
a. The error, (E), caused by the finite ‘‘ON’’ resist-
ance, R
ON
, of the multiplexing switches is given
by:
E(%)
e
100
1
a
R
IN
/(R
ON
a
R
S
a
D
R
ON
)where:
R
IN
e
following stage input impedance
D
R
ON
e
‘‘ON’’ resistance modulation which is
negligible for JFET switches like the LF11508
Example: Let R
ON
e
450
X
,
D
R
ON
e
0, R
S
e
0, T
A
e
25
§
C and allowable E
e
0.01% which is equivalent
to 1/2 LSB in a 12-bit system:
R
IN
min
e
R
ON
(100
b
E)
E
e
4.5 M
X
Note that if temperature effects are included, some
gain (or full scale) drift will occur; but effects on linearity
are small.
b. Multiplexer settling time (t
s
):
t
s(ON)
: is the time required for the MUX output to
settle within a predetermined accuracy, as
shown in Table I.
C
S
(Figure 6): MUX output capacitance
a
fol-
lowing stage input capacitance
a
any stray ca-
pacitance at this node.
TABLE I.
ERROR %
BITS
t
s
(ON)
TO 1/2 LSB
0.2
0.05
0.01
0.0008
8
6.2t
7.6t
9t
11.8t
10
12
16
t
e
C
S
(R
ON
a
R
S
)
ll
R
IN
t
s(OFF)
: is the time it takes to discharge C
S
within
a tolerable error. The ‘‘OFF’’ settling time should
be taken into account for bipolar inputs where its
effects will appear as a worse case of doubling
of the t
s(ON)
.
2. Sample and Hold Influence on System Accuracy
The sample and hold, if used, also introduces errors into
the system accuracy due to:
#
Offset voltage of sample and hold
#
Droop rate in the Hold mode
#
T
A
: Aperture time or time delay between the time of a
digital Hold command and the actual Hold occurance
#
Taq: Acquisition time or time it takes to acquire an
analog input and settle within a predetermined error
band
#
Hold step: Error created during the Sample to Hold
mode caused by an undesirable charge injected into
the Hold capacitor C
h
.
For more details on sample and hold errors, see the
LF198/LF298/LF398 data sheet.
3. A/D Converter Influence on System Accuracy
The ‘‘a(chǎn)ccuracy’’ of the A/D converter is the best possible
system accuracy. In most data acquisition systems, the
A/D converter is the most expensive single component,
so its error will often dominate system error. Care should
be taken that MUX, S/H and input source errors do not
exceed system error requirements when added to A/D
errors. For instance, if an 8-bit accuracy system is desired
and an 8-bit A/D converter is used, the accuracy of the
MUX and S/H should be far better than 8 bits.
For details on A/D converter specifications, see AN-156.
TL/H/5668–13
FIGURE 5. Random-Addressed, Multiplexed DAU
FIGURE 6. 8-Channel MUX
7
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LF13508N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
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| LF13509 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13509D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| LF13509M | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
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