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參數資料
| 型號： | LDTC115EM3T5G |
| 廠商： | 樂山無線電股份有限公司 |
| 英文描述： | Bias Resistor Transistors |
| 中文描述： | 偏置電阻晶體管 |
| 文件頁數： | 1/10頁 |
| 文件大?。?/td> | 176K |
| 代理商： | LDTC115EM3T5G |
LESHAN RADIO COMPANY, LTD.
LDT
C
114EM3T5G_S
-1/
1
0
Bias Resistor Transistors
NPN Silicon Surface Mount Transistors
With Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor.The BRT eliminates these individual components by integrating
them into a single device. The use of a BRT can reduce both system
cost and board space. The device is housed in the SOT-723 package
which is designed for low power surface mount applications.
Simplifies Circuit Design
Reduces Board Space
LDTC114EM3T5G
Series
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
260 (Note 1)
600 (Note 2)
2.0 (Note 1)
4.8 (Note 2)
mW
Thermal Resistance –
Junction-to-Ambient
R
θ
JA
480 (Note 1)
205 (Note 2)
°
C/W
Storage Temperature Range
T
stg
–55 to +150
°
C
xx
M
= Specific Device Code
= Date Code
MARKING
DIAGRAM
3
2
1
XX M
mW/
°
C
Reduces Component Count
The SOT-723 Package can be Soldered using Wave or Reflow.
Available in 4 mm, 8000 Unit Tape & Reel
These are Pb-Free Devices.
Version 1.0
SOT-723
1
2
3
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
PIN 1
BASE
(INPUT)
R1
R2
°
C
T
J
150
Junction Temperature
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
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