參數(shù)資料
型號: LDS9003-002-T2
廠商: IXYS
文件頁數(shù): 4/30頁
文件大?。?/td> 425K
描述: IC TEMP/PWM CONTROLLER 16WQFN
標(biāo)準(zhǔn)包裝: 1
功能: 溫度監(jiān)控系統(tǒng)(傳感器)
傳感器類型: 外部
拓?fù)洌?/td> ADC,振蕩器,寄存器庫
輸出類型: I²C?
輸出警報:
輸出風(fēng)扇:
電源電壓: 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-TQFN
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: LDS9003-002-T2-6
LDS9003 / 9001
?009 IXYS Corp.
4
Doc. No. 9003/9001_DS, Rev. N1.0
Characteristics subject to change without notice
I
2
C CHARACTERISTICS
Over recommended operating conditions unless otherwise specified for 2.5 ?VIN ?.5V, over full ambient temperature range -40 to +85篊.
Symbol    Parameter
Min
Max
Unit
f
SCL
SCL Clock Frequency
0
400
kHz
t
HD:STA
Hold Time (repeated) START condition
0.6
t
LOW
LOW period of the SCL clock
1.3
t
HIGH
HIGH period of the SCL clock
0.6
t
SU:STA
Set-up Time for a repeatedSTART condition
0.6
t
HD:DAT
Data In Hold Time
0
0.9
ns
t
SU:DAT
Data In Set-up Time
100
ns
t
R
Rise Time of both SDAT and SCLK signals
300
ns
t
F
Fall Time of both SDAT and SCLK signals
300
ns
t
SU:STO
Set-up Time for STOP condition
0.6
t
BUF
Bus Free Time between a STOP and START condition
1.3
t
AA
SCLK Low to SDAT Data Out and ACK Out
0.9
t
DH
Data Out Hold Time
300
ns
Figure 1: I
2
C Bus Timing Diagram
READ OPERATION:
Option 1: Standard protocol sequential read:
S
Slave Address
R
A
Data 0
A
Data 1
A
Data 2
Data n
A*
P
From: Reg. m    Reg. m+1
Reg. m+2
Reg. m+n,
where Reg. m is the last addressed in the write operation register
Option 2: Random access:
S
Slave Address
R
A
Data m
A*
P
From reg. m, where Reg. m is the last addressed in the write operation register
Option 3: Random access with combined (extended) protocol:
S
Slave Address
W
A
Register Address m
A
Sr
Slave Address
R
A
Data m
A*
P
WRITE OPERATION:
Option 1: Standard protocol sequencial write:
S
Slave Address
W    A
Register Address m
A
Data 0
A
Data 1
A
Data 2
Data k
A*
P
To: Reg. m
Reg. m+1
Reg. m+2    Reg. m+k
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