參數(shù)資料
型號: LDO_52
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: IP LIBRARY: HIGH PSRR. LOW POWER. 70MA LOW DROPOUT VOLTAGE REGULATOR.
中文描述: IP庫:高PSRR。低功耗。 70mA的低壓差穩(wěn)壓器。
文件頁數(shù): 2/4頁
文件大?。?/td> 204K
代理商: LDO_52
LDO_51
2/4
ELECTRICAL CHARACTERISTICS
3V < V
IN
< 5.5V, -55°C < T
A
< +125°C, V
REF
= 2.8V, 0.8
μ
F < C
OUT
< 1.2
μ
F, 20m
< ESR < 0.6
.
100
μ
A < I
LOAD
< 80mA.
Typical case :
V
IN
= 4V, T = 25°C, I
OUT
= 40mA.
Notes: 1. Above characteristics are given for 3V minimum input operating range voltage, but regulator is
operational with 2.7V minimum input voltage.
2. All parameters are guaranteed with 170mV Dropout voltage.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Input Voltage Range (Note 1)
V
IN
V
OUT
3
5,5
V
Output Voltage
2,8
V
Output Voltage Accuracy
-3
3
%
Output current
I
OUT
R
ON
V
DO
0,1
80
mA
P
MOS
Output Resistance
Dropout Voltage
0,5
V
OUT
= 50mV,
I
LOAD
= 80mA
(Note 2)
50
mV
170
Quiescent current
I
Q
I
LOAD
= 100
μ
A
I
LOAD
= 80mA
Power down active
30
50
μ
A
130
170
Power down mode
quiescent current
I
QPDM
100
nA
Power Supply Rejection Ratio
PSRR
f < 10KHz
50
60
dB
f < 100KHz
40
50
Line Regulation
Lir
I
LOAD
= 80mA,
V
IN
= 3V to 5.1V
3
6
mV
Load Regulation
Ldr
30
45
mV
Line Transient
Lirt
V
IN
= 300mV
t
RISE
= t
FALL
= 10
μ
s
10% to 90%
and 90% to 10%
of 80mA in 10
μ
s
1
mV
Load Transient
Ldtr
1
mV
Output Noise Voltage
en
100Hz
1,5
1KHz
550
100KHz
300
Output decoupling Capacitor
C
OUT
1
μ
F
Settling time
From power down to
active mode
25
μ
s
Short Circuit Current Limit
I
SHORT
180
230
300
mA
Hz
------V
Hz
--nV
相關(guān)PDF資料
PDF描述
LDO_53 IP LIBRARY: HIGH PSRR. VERY LOW POWER. 40MA LOW DROPOUT VOLTAGE REGULATOR.
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