–
6
–
LCX038ART
Input Signals
1. Input signal voltage conditions
(V
SS
= 0V)
1
Input video signal shall be symmetrical to VVC.
2
The typical value of the common pad voltage may lower its suitable voltage according to the set construction
to use. In this case, use the voltage of which has maximum contrast as typical value.
When the typical value is lowered, the maximum and minimum values may lower.
3
Input a uniformity improvement signal PSIG in the same polarity with video signals VSIG1 to VSIG12 and
which is symmetrical to VVC. PSIG wave form is 2 steps like below, in the upper chart, upper shows signal
level of the 1st step, lower shows signal level of the 2nd step. Also, the rising and falling of PSIG are
synchronized with the rising of PCG pulse, and the rise time trPSIG and fall time tfPSIG are suppressed
within 450ns (as shown in a diagram below).
The optimum input voltage of PSIG may be changed according as drive conditions of the drive side.
Level Conversion Circuit
The LCX038ART has a built-in level conversion circuit in the clock input unit on the panel. The input signal
level increases to HV
DD
or VV
DD
. The V
CC
of external ICs are applicable to 5 ± 0.5V.
trPSIG
tfPSIG
VVC
PSIG
PCG
90%
10%
PRG
4
PsigG
PsigB
Input waveform of uniformity improvement signal PSIG
4
PRG shows the time of the 1st step of PSIG signal, and it is not input to the panel.
Item
H shift register input voltage
HST, HCK1, HCK2, RGT
(Low)
(High)
(Low)
(High)
VHIL
VHIH
VVIL
VVIH
VVC
Vsig
Vcom
VpsigB
VpsigG
–
0.5
4.5
–
0.5
4.5
7.4
VVC
–
5.0
VVC
–
0.5
VVC ± 4.9
VVC ± 1.8
0.0
5.0
0.0
5.0
7.5
7.0
VVC
–
0.4
VVC ± 5.0
VVC ± 1.9
0.4
5.5
0.4
5.5
7.6
VVC + 5.0
VVC
–
0.3
VVC ± 5.1
VVC ± 2.0
V
V
V
V
V
V
V
V
V shift register input voltage
HB, VB, BLK, VST, VCK,
PCG, ENB, DWN
Video signal center voltage
Video signal input range
1
Common voltage of panel
2
Uniformity improvement signal
input voltage (PSIG)
3
Symbol
Min.
Typ.
Max.
Unit