參數(shù)資料
型號(hào)： LCX009AKB
廠商： Sony Corporation
英文描述： 1.8cm (0.7-inch) NTSC/PAL Color LCD Panel
中文描述： 1.8厘米（0.7英寸）的NTSC / PAL彩色液晶面板
文件頁(yè)數(shù)： 16/22頁(yè)
文件大?。?/td> 312K
代理商： LCX009AKB
– 16 –
LCX009AK
2. LCD Panel Operations
A vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse
to every 225 gate lines sequentially in every single horizontal scanning period. A vertical shift register scans
the gate lines from the top to bottom of the panel.
The selected pulse is delivered when the enable pin turns to High level. PAL mode images are displayed by
controlling the enable and VCK1, VCK2 pins. The enable pin should be High when not in use.
A horizontal driver, which consists of horizontal shift registers, gates and CMOS sample-and-hold circuit,
applies selected pulses to every 800 signal electrodes sequentially in a single horizontal scanning period.
Scanning direction of horizontal shift register can be switched with RGT pin.Scanning direction is left to right
for RGT pin at High level; and right to left for RGT pin at Low level.(These scanning directions are from a
front view.) Normally, set to High level.
Vertical and horizontal drivers address one pixel, and then dot Thin Film Transistors (TFTs; two TFTs for one
dot) turn on to apply a video signal to the dot. The same procedures lead to the entire 225
×
800 dots to
display a picture in a single vertical scanning period.
Pixels are arranged in a delta pattern, where sets of RGB pixels are positioned with 1.5-dot offset against
juxtaposed horizontal line. For this reason, 1.5-dot offset of a horizontal driver output pulse against horizontal
synchronized pulse is required to apply a video signal to each dot properly. 1 H reversed displaying mode is
required to apply video signal to the panel.
The CLR pin is provided to eliminate the shading effect caused by the coupling of selected pulses. While
maintaining the CLR at High level, the VV
DD
potential drops to approximately 8.5V. This pin should be
grounded when not in use.
The video signal must be input with polarity-inverted system in every horizontal cycle.
Timing diagrams of the vertical and the horizontal right-direction scanning (RGT = High level) display cycle
are shown below.
Hck1 and Hck2 should be exchanged to display the left-direction horizontal scanning (RGT = Low level). This
exchange enables the center of the image to be fixed by eliminating offsets.
Vertical display 225H (14.3ms)
1
2
224
225
(1) Vertical display cycle
VD
Vst
Vck1
Vck2
Horizontal display cycle (48.4μs)
1
2
3
4
5
6
270
271
(2) Horizontal display cycle (right-direction scanning)
BLK
Hst
Hck1
Hck2
The horizontal display cycle consists of 800/3 = 267 clock pulses because of RGB simultaneous sampling
.
Refer to Description of Operation "3. RGB Simultaneous Sampling''
相關(guān)PDF資料
PDF描述
LCX011AM 3.6cm (1.43-inch) LCD Panel (with microlens)
LCX012BL 3.3cm (1.3-inch) Black-and-White LCD Panel
LCX016 TOOLS, EXTRACTORS
LCX016AL 3.3cm (1.3-inch) Black-and-White LCD Panel
LCX016AM 3.3cm (1.3-inch) Black-and-White LCD Panel
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LCX00PBLC 制造商:ON Semiconductor 功能描述:
LCX011AM 制造商:SONY 制造商全稱:Sony Corporation 功能描述:3.6cm (1.43-inch) LCD Panel (with microlens)
LCX012BL 制造商:SONY 制造商全稱:Sony Corporation 功能描述:3.3cm (1.3-inch) Black-and-White LCD Panel
LCX016 制造商:SONY 制造商全稱:Sony Corporation 功能描述:3.3cm (1.3-inch) Black-and-White LCD Panel
LCX016AL 制造商:SONY 制造商全稱:Sony Corporation 功能描述:3.3cm (1.3-inch) Black-and-White LCD Panel
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