參數(shù)資料
型號： lCL8068ACJD
廠商： Intersil Corporation
英文描述： 14-Bit/16-Bit, Microprocessor- Compatible, 2-Chip, A/D Converter
中文描述： 14-Bit/16-Bit，微處理器兼容，2芯片，A / D轉(zhuǎn)換
文件頁數(shù)： 8/21頁
文件大?。?/td> 198K
代理商： LCL8068ACJD
5-13
System Electrical Specifications: ICL8068/ICL7104
V++ = +15V, V+ = +5V, V- = -15V, f
CLOCK
= 200kHz (Note 16)
PARAMETER
TEST
CONDITIONS
ICL8068A/ICL7104-14
ICL8068A/ICL7104-16
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Zero Input Reading
V
IN
= 0V, V
REF
= 2V
V
IN
= V
REF
= 2V
-4V
≤
V
IN
≤
+4V
-00000
±
00000
+00000
-00000
±
00000
+00000
Counts
Ratiometric Error (Note 13)
-1
0
1
-1
0
1
LSB
Linearity Over
±
Full Scale (Error of
Reading from Best Straight Line)
-
0.5
1
-
0.5
1
LSB
Differential Linearity (Difference
between Worst Case Step of Adjacent
Counts and Ideal Step)
-4V
≤
V
IN
≤
+4V
-
0.01
-
-
0.01
-
LSB
Rollover Error (Difference in Reading
for Equal Positive & Negative Voltage
Near Full Scale)
-V
IN
= +V
IN
4V
-
0.5
1
-
0.5
1
LSB
Noise (P-P Value Not Exceeded 95%
of Time)
V
IN
= 0V,
Full Scale = 4V
-
2
-
-
2
-
μ
V
Leakage Current at Input (Note 14)
V
IN
= 0V
V
IN
= 0V,
0
o
C to 70
o
C
-
100
165
-
100
165
pA
Zero Reading Drift
-
0.5
-
-
0.5
-
μ
V/
o
C
Scale Factor Temperature Coefficient
(Note 15)
V
IN
= 4V,
0
o
C to 50
o
C
ext. ref. 0ppm/
o
C
-
2
5
-
2
5
ppm/
o
C
System Electrical Specifications: ICL8052/ICL7104
V++ = +15V, V+ = +5V, V- = -15V, f
CLOCK
= 200kHz (Note 16)
PARAMETER
TEST
CONDITIONS
ICL8052A/ICL7104-14
ICL8052A/ICL7104-16
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Zero Input Reading
V
IN
= 0V, V
REF
= 2V
V
IN
= V
REF
= 2V
-4V
≤
V
IN
≤
+4V
-00000
±
00000
+00000
-00000
±
00000
+00000
Counts
Ratiometric Error (Note 15)
-1
0
1
-1
0
1
LSB
Linearity Over
±
Full Scale (Error of
Reading from Best Straight Line)
-
0.5
1
-
0.5
1
LSB
Differential Linearity (Difference
between Worst Case Step of Adjacent
Counts and Ideal Step)
-4V
≤
V
IN
≤
+4V
-
0.01
-
-
0.01
-
LSB
Rollover Error (Difference in Reading
for Equal Positive and Negative
Voltage Near Full Scale)
-V
IN
= +V
IN
≈
4V
-
0.5
1
-
0.5
1
LSB
Noise (Peak-to-Peak Value Not
Exceeded 95% of Time)
V
IN
= 0V,
Full Scale = 4V
-
30
-
-
30
-
μ
V
Leakage Current at Input (Note 14)
V
IN
= 0V
V
IN
= 0V,
0
o
C to 70
o
C
-
20
30
-
20
30
pA
Zero Reading Drift
-
0.5
-
-
0.5
-
μ
V/
o
C
Scale Factor Temperature Coefficient
V
IN
= 4V,
0
o
C to 50
o
C
ext. ref. 0ppm/
o
C
-
2
-
-
2
-
ppm/
o
C
NOTES:
13. Tested with low dielectric absorption integrating capacitor.
14. The input bias currents are junction leakage currents which approximately double for every 10
o
C increase in the junction temperature,
T
J
. Due to limited production test time, the input bias currents are measured with junctions at ambient temperature. In normal oper-
ation the junction temperature rises above the ambient temperature as a result of internal power dissipation, P
D
. T
J
= T
A
+ R
θ
JA
P
D
where R
θ
JA
is the thermal resistance from junction to ambient. A heat sink can be used to reduce temperature rise.
15. The temperature range can be extended to 70
o
C and beyond if the Auto-Zero and Reference capacitors are increased to absorb the
high temperature leakage of the 8068. See note 14 above.
16. System Electrical Specifications are not tested; for reference only.
ICL8052/ICL7104, ICL8068/ICL7104
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