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參數(shù)資料
| 型號： | LC89962 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | NTSC Format Delay Line |
| 中文描述： | NTSC格式延遲線 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 98K |
| 代理商： | LC89962 |
4. Measure the differential gain (DG) and differential phase (DP) using a vector scope with a 5-step function wave
input. (See the following figure.)
5. To measure LS, input a 5-step function wave and measure the ratio of the sync level (S) to the luminance level (Y).
S [mV]
Y [mV]
LS = ————
×
100 [%]
6. To measure clock leakage (Lck), measure the 4fsc (14.3 MHz) component in the output signal with a spectrum
analyzer when no input signal is presented.
7. To measure the noise level (N
O
), measure the noise output in the OUT pin output when no input signal is present
with a video noise meter. Set up the noise meter with a 200-kHz high-pass filter, a 4.2-MHz low-pass filter, and
3.58-MHz trap filter.
8. The following formula is used to calculate the output impedance (Z
O
).
V1 [mVp-p] – V2 [mVp-p]
Z
O
= ———————————
×
500 [
]
V2 [mVp-p]
9. To measure the delay time (TD), measure the delay time of the output signal to the input signal. In this measurement,
the delay time associated with the low-pass filter must be excluded.
No. 5420-3/6
LC89962, LC89962M
Output signal symbol
SW3
Input signal
V1
a
Sine wave: 200 kHz, 500 mV p-p
V2
b
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC89962M | NTSC Format Delay Line |
| LC89970 | PAL CCD Delay Line |
| LC89970M | PAL CCD Delay Line |
| LC89971 | Multi-system CCD Delay Line |
| LC89971M | Multi-system CCD Delay Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC89962M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:NTSC Format Delay Line |
| LC89970 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PAL CCD Delay Line |
| LC89970M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PAL CCD Delay Line |
| LC89971 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Multi-system CCD Delay Line |
| LC89971M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Multi-system CCD Delay Line |
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