參數(shù)資料
型號: LC88F83B0AUC-X1
廠商: ON Semiconductor
文件頁數(shù): 19/25頁
文件大?。?/td> 0K
描述: IC MCU 16BIT 128K FLASH 120TQFP
標(biāo)準(zhǔn)包裝: 900
核心處理器: Xstormy16
芯體尺寸: 16-位
速度: 4.2MHz
連通性: SIO,UART/USART
外圍設(shè)備: LCD,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b
振蕩器型: 內(nèi)部
工作溫度: -20°C ~ 75°C
封裝/外殼: *
包裝: *
LC88F83B0A
No.A1228-3/25
Timers
Timer 0: 16-bit timer that supports PWM/toggle outputs
1) With 5-bit prescaler
2) 8-bit PWM
× 2/8-bit timer + 8-bit PWM mode selectable
3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator
Timer 1: 16-bit timer with capture registers
1) With 5-bit prescaler
2) May be divided into 2 channels of 8-bit timer
3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator
Timer 3: 16-bit timer that supports PWM/toggle outputs
1) With 8-bit prescaler
2) 8-bit timer × 2ch/8-bit timer + 8-bit PWM mode selectable
3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator
Timer 4: 16-bit timer that supports toggle outputs
1) Clock source selectable from system clock and prescaler 0
Timer 5: 16-bit timer that supports toggle outputs
1) Clock source selectable from system clock and prescaler 0
Base timer
1) Clock may be selected from OSC0 (32.768kHz crystal oscillator) and frequency-divided output of system clock.
2) Interrupts can be generated in 7 timing schemes.
Watchdog Timer
1) Driven by the base timer + internal watchdog timer dedicated counter.
2) Interrupt or reset mode selectable
SIO0: 8-bit synchronous SIO
1) LSB first/MSB first mode selectable
2) It is possible to communicate with 8 bits or less. (1 to 8 bits specifiable in 1-bit units)
3) Built-in 8-bit baudrate generator (transfer clock cycle 4 tCYC to 512 tCYC)
4) Automatic continuous data transmission (9 to 32768 bits specifiable in 1-bit units)
5) Interval function (interval time: 0 to 64 SIOCLKs specifiable in 1 SIOCLK units)
6) Wakeup function
UART2: Asynchronous SIO
1) Full duplex transmission
2) Start bit 1, data bit 8 (LSB first), stop bit 1
3) Parity bit: None/even parity/odd parity
4) Transfer rate: 8 to 4096 tCYC
5) Baudrate source clock: systemclock/OSC0/OSC1
6) Wakeup function
AD converter: 12bit
× 4 channels
1) 12-/8-bit resolution selectable
2) Analog input: 4 channels
3) Comparator mode
4) Automatic reference voltage generation
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