參數(shù)資料
型號(hào): LC86F3348A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8-Bit Single Chip Microcontroller with 64K(64K×8 bit)-Byte ROM and 640(640 ×8 bit)-Byte RAM On Chip(8位單片微控制器(帶64K(64K×8 bit)字節(jié)ROM和640(640 ×8 bit)字節(jié)RAM))
中文描述: 8位單片機(jī)具有64K的微控制器(64K的× 8位)字節(jié)ROM和640(640 × 8位),片上字節(jié)的RAM(8位單片微控制器(帶64K的(64K的× 8位)字節(jié)光盤(pán)和640(640 × 8位)字節(jié)的RAM))
文件頁(yè)數(shù): 4/22頁(yè)
文件大?。?/td> 695K
代理商: LC86F3348A
LC86F3348A
4/22
(11) Watchdog timer
External RC circuit is required
Interrupt or system reset is activated when the timer overflows
(12) ROM correction function
Max 128 bytes/2 address
(13) Interrupts
- 15-sources 9-vectored interrupts
1. External Interrupt INT0
2. External Interrupt INT1
3. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)
4. External Interrupt INT3, base timer
5. Timer/counter T0H (Upper 8 bits)
6. Timer T1H,T1L
7. SIO0
8. Vertical synchronous signal interrupt (VS), scanning line, AD
9. IIC, Port 0
- Interrupt priority control
Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high
priority can be assigned to the interrupts from 3 to 9 listed above. For the external interrupt INT0 and INT1, high
or highest priority can be set.
(14) Sub-routine stack level
- A maximum of 128 levels (stack area is assigned on the internal RAM)
(15) Multiplication/division instruction
- 16 bits
×
8 bits (7 instruction cycle times)
- 16 bits / 8 bits (7 instruction cycle times)
(16) 3 oscillation circuits
- Built-in RC oscillation circuit used for the system clock
- Built-in VCO circuit used for the system clock and OSD clock
- On-chip X’tal oscillation circuit used for PLL reference and the system clock and base timer clock
(17) Standby function
- HALT mode
The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is
stopped. This mode can be released by the interrupt request signals or the system reset.
- HOLD mode
The HOLD mode is used to stop oscillations ; the RC (internal),VCO, and the X’tal oscillations. This mode can be
released by the following conditions.
Pull the reset terminal (RES) to low level.
Feed the selected level to either P70/INT0 or P71/INT1.
Feed the Port 0 interrupt condition
(18) Applicable mask ROM version
- LC863348 / LC863340/ LC863332 / LC863328 / LC863324 / LC863320 / LC863316
(19) Package
- DIP42S
- QIP48E
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