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參數(shù)資料
| 型號： | LC86E6449 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-Bit Single Chip Microcontroller with 48K Byte UVEPROM(8位單片微控制器（帶48K字節(jié)紫外線可擦除EPROM）) |
| 中文描述： | 8位單片機微控制器48,000字節(jié)UVEPROM（8位單片微控制器（帶48,000字節(jié)紫外線可擦除存儲器）） |
| 文件頁數(shù)： | 15/22頁 |
| 文件大小： | 636K |
| 代理商： | LC86E6449 |
LC86E6449
15/22
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5 to 6.0
min.
-1
max.
unit
IOFF(1)
Output P-channel
Tr. OFF
VOUT=VSS
Output P-channel
Tr. OFF
VOUT=VDD-40V
Output P-channel
Tr. OFF
Output off-
leakage current
IOFF(2)
S0/T0 to S6/T6
S28 to S37
(without pull-down
resistor)
4.5 to 6.0
-30
μ
A
‘L’ level hold Tr.
of high voltage
withstand input
pull-down
transistor resistor
Rinpd
S16 to S37
4.5 to 6.0
400
k
Rpd
S7/T7 to S15/T15
S16 to S27
(without pull-down
resistor)
Port 1
Ports 70,71,72,73
RES
All pins
Output P-channel
Tr. OFF
VOUT=3V
Vp=-30V
Output disable
5.0
60
100
200
k
Hysteresis
voltage
VHIS
4.5 to 6.0
0.1VDD
V
Pin capacitance
CP
f=1MHz
VIN=VSS for all
unmeasured terminals.
Ta=25
°
C
4.5 to 6.0
10
pF
4. Serial Input/Output Characteristics at Ta=+10
°
C to +40
°
C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5 to 6.0
min.
2
1
max.
unit
Cycle
Low Level
pulse width
High Level
pulse width
Cycle
Low Level
pulse width
High Level
pulse width
Data set-up time
Data hold time
Output delay time
(External clock
using for serial
transfer clock)
Output delay time
(Internal clock
using for serial
transfer clock)
t
CKCY
(1)
t
CKL
(1)
I
t
CKH
(1)
SCK0,SCK1 Refer to figure 5
1
t
CKCY
(2)
t
CKL
(2)
2
1/2t
CKCY
S
O
t
CKH
(2)
SCK0,SCK1 Use pull-up
resistor (1k
)
in the open drain
output.
Refer to figure 5
Data set-up to
SCK0,1
Data hold from
SCK0,1
Refer to figure 5
Use pull-up
resistor (1k
) in
the open drain
output.
Data hold from
SCK0,1
Refer to figure 5
4.5 to 6.0
1/2t
CKCY
t
CYC
t
ICK
0.1
S
t
CKI
SI0,SI1
SB0,SB1
4.5 to 6.0
0.1
t
CKO(1)
7/12
t
CYC
+0.2
S
t
CKO(2)
SO0,SO1
SB0,SB1
4.5 to 6.0
1/3
t
CYC
+0.2
μ
s
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