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參數(shù)資料
| 型號： | LC868910 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 88K |
| 代理商： | LC868910 |
LC868900/10/50/60
No.6709-14/20
MODE3=1 : Start the rightmost position
MODE3=0 : Start the leftmost position
The start upper address counter is a 7-bit down-counter with preset function. The start upper address is
decremented by one when a start lower address has an underflow. When the start upper address is
decremented during 0 state, it is set the start addressvalue automatically.
Internal RAM=1280 bytes : Start upper address counter=7FH
Internal RAM= 640 bytes : Start upper address counter=3FH
6. Set screen2 display start address
Write code '09H' (in hexadecimal notation) into the instruction register and specify the Screen2 Start Address register.
REGISTER R / W
Instruction
Screen2
RS
1
0
DB7
0
0
DB6
0
DB5
0
DB4
0
DB3
1
DB2
0
DB1 DB0
0
0
0
1
Screen2 Start Address
This instruction writes the display-start upper address value in the Screen2 Start Address register.
The display start address is the RAM address at whitch data to be displayed at the leftmost position
(MODE3=0) or the rightmost position (MODE3=1) of the top line of the screen is stored.
MODE3=1 : Start the rightmost position
MODE3=0 : Start the leftmost position
The start upper address counter is a 7-bit down-counter with preset function. The start upper address is
decremented by one when a start lower address has an underflow.When the start upper address is
decremented during 0 state, it is set the start address value automatically.
Internal RAM=1280 bytes : Start upper address counter=7FH
Internal RAM= 640 bytes : Start upper address counter=3FH
7. Set cursor (lower) address (RAM read/write lower address)
Write code '0AH' (in hexadecimal notation) into the instruction register and the lower cursor address register.
REGISTER R / W
Instruction
Lower
RS
1
0
DB7
0
0
DB6
0
0
DB5
0
0
DB4
0
0
DB3
1
DB2
0
DB1 DB0
1
0
0
0
Lower cursor address
This instruction writes the cursor address value in the cursor address counter. The curosr address indicates the
address for exchanging display data with display RAM. In other words, data at the address specified by the
cursor address is read form or written into display RAM. The cursor address in divided into a lower address
(4 bits) .
The cursor lower address counter is a 4-bit down-counter with preset function. The cursor lower address is
decreased by one every RAM read/write timing. When the cursor lower address is decreased during 0 state,
it is set Dn-1 automatically.
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