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參數(shù)資料
| 型號： | LC867224 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Hex Buffers And Line Drivers With 3-State Outputs 16-TSSOP -40 to 85 |
| 中文描述： | 3態(tài)輸出六緩沖線性驅(qū)動器 TSSOP-16封裝 工作溫度：-40℃_85℃ |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 622K |
| 代理商： | LC867224 |
LC86E7248
No.6749-8/19
Pin name
Port A
(S0/PA0 –
S7/PA7)
Port B
(S8/PB0 –
S15/PB7)
Port C
(S16/PC0 –
S23/PC7)
I/O
I/O
Function description
Option
PROM mode
Address input
A0 to A7
Segment output terminal for LCD display
Can be used as a general input/output
port
Segment output terminal for LCD display
Can be used as a general input/output
port
Segment output terminal for LCD display
Can be used as a general input/output
port
-
I/O
-
Address input
A8 to A13
I/O
-
PROM control
signal input
TA (*5)
Address input
A14, A15
-
Port D
(S24/PD0 –
S31/PD7)
Port E
(S32/PE0 –
S39/PE7)
Port F
(S40/PF0 –
S47/PF7)
Port L
(COM0/PL0
–
COM3/PL3)
V1/PL4 –
V3/PL6
RES
XT1/
P74
I/O
Segment output terminal for LCD display
Can be used as a general input/output
port
Segment output terminal for LCD display
Can be used as a general input/output
port
Segment output terminal for LCD display
Can be used as a general input/output
port
Common output terminal for LCD display
Can be used as a general input port
-
I/O
-
-
I/O
-
-
I/O
-
-
I
Bias power terminal for LCD drive
Can be used as a general input port
Reset pin
Input pin for 32.768kHz crystal
oscillation
In case of non use, connect to VDD.
Other function
A general input port
P74
Output pin for 32.768kHz crystal
oscillation
In case of non use, should be left
unconnected
Other function
A general input port P75
Input pin for ceramic resonator
oscillation
Output pin for ceramic resonator
oscillation
-
-
I
I
-
-
-
-
XT2/P75
O
(I)
-
-
CF1
I
-
-
CF2
O
-
-
* All of port options can be specified in a bit unit except the pull-up resistor of port 0.
[Notes] The VDD1, VDD2 and VDD3 terminals must be shorted electrically each other.
The VSS1, VSS2 and VSS3 terminals must be shorted electrically each other.
*1 Connect like the following figure to reduce noise into a VDD terminals.
*2 Memory select input for data security
*3 Output enable input
*4 Chip enable input
*5 TA
!
PROM control signal input
Power
Supply
VDD1
VDD2
VDD3
VSS1 VSS2 VSS3
LSI
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