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參數(shù)資料
| 型號： | LC865608 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Octal Buffers/Drivers With 3-State Outputs 20-PDIP -40 to 85 |
| 中文描述： | 8位單片機微控制器的一次性可編程UVEPROM |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 670K |
| 代理商： | LC865608 |
LC86E5632
No.6744-11/21
2. Recommended Operating Range at Ta=+10
°
C to +40
°
C, VSS=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
min.
4.5
max.
6.0
unit
Operating
Supply voltage
Hold voltage
VDD(1)
VDD
0.98
μ
s
≤
t
CYC
t
CYC
≤
400
μ
s
RAMs and the
registers hold voltage
at HOLD mode.
Output disable
VHD
VDD
2.0
6.0
VIH(1)
Port 0
(Schmitt)
4.5 to 6.0
0. 4VDD
+0.9
0.75VDD
VDD
VDD
VDD
VIH(2)
Ports 1,2
Ports 72,73
Port 70
(Port input/interrupt)
Port 71
RES
Port 70
(Watchdog timer)
Port
74
Port 8
Ports 3,4,5 of
CMOS output (Schmitt)
Ports 3,4,5 of open drain
output
Port 0
Ports 1,2,3,4,5
Ports 72,73
Port 70
(Port input/interrupt)
Port 71
RES
Port 70
(Watchdog timer)
Port
74
Port 8
(Schmitt)
Output disable
4.5 to 6.0
VIH(3)
(Schmitt)
Output N-channel
Tr. OFF
4.5 to 6.0
0.75VDD
VIH(4)
Output N-channel
Tr. OFF
Output N-channel
Tr. OFF
Output disable
4.5 to 6.0
0.9VDD
VDD
VDD
VDD
VIH(5)
4.5 to 6.0
0.75VDD
Input high
voltage
VIH(6)
4.5 to 6.0
0.75VDD
VIH(7)
(Schmitt)
(Schmitt)
Output disable
4.5 to 6.0
0.75VDD
13.5
VIL(1)
VIL(2)
Output disable
Output disable
4.5 to 6.0
4.5 to 6.0
VSS
VSS
0.2VDD
0.25VDD
(Schmitt)
VIL(3)
(Schmitt)
N-channel Tr.OFF
4.5 to 6.0
VSS
0.25VDD
VIL(4)
N-channel Tr.OFF
4.5 to 6.0
VSS
0. 8VDD
-1.0
0.25VDD
Input low
voltage
VIL(5)
N-channel Tr.OFF
4.5 to 6.0
VSS
V
Operation
cycle time
Oscillation
frequency
range
t
CYC
4.5 to 6.0
0.98
400
μ
s
FmCF(1)
CF1, CF2
6MHz
(ceramic resonator
oscillation)
Refer to figure 1
1.5MHz
(ceramic resonator
oscillation)
Refer to figure 1
RC oscillation
32.768kHz
(crystal oscillation)
Refer to figure 2
Continue.
4.5 to 6.0
6
FmCF(2)
CF1, CF2
4.5 to 6.0
1.5
FmRC
FsXtal
XT1, XT2
4.5 to 6.0
4.5 to 6.0
0.3
0.8
32.768
3.0
MHz
(Note 1)
kHz
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