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參數(shù)資料
| 型號(hào)： | LC822152 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | CMOS IC CCD-LCD Interface ASIC |
| 中文描述： | CMOS集成電路的CCD LCD接口的ASIC |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 660K |
| 代理商： | LC822152 |
LC822152
No.8075-3/11
Electric Characteristics
D.C. Characteristics : Input/Output Levels
at Ta = -30 to +70
°
C, VDD30 = 2.7 to 3.3V, VSS = 0V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Applicable
Pins
Input High Level Voltage
VIH
VIL
VIH
VIL
IIH
0.7VDD30
V
Input Low Level Voltage
CMOS support
0.2VDD30
V
2
Input High Level Voltage
0.75VDD30
V
Input Low Level Voltage
CMOS support Schmidt
0.15VDD30
V
1
VI = VDD30
VI = VDD30,
with pull-down resistor
-10
10
μ
A
7
Input High Level Current
-10
100
μ
A
6
Input Low Level Current
IIL
VOH
VI = VSS
IOH = -2mA
IOH = -4mA
IOH = -8mA
IOL = 1.8mA
IOL = 3.6mA
IOL = 7.2mA
At HiZ Output
-10
10
μ
A
6, 7
VDD30-0.8
VDD30-0.8
VDD30-0.8
V
3
V
8
Output High Level Voltage
V
4
0.4
V
3
0.4
V
8
Output Low Level Voltage
VOL
0.4
V
4
Output Leak Current
IOZ
RDN
-10
10
μ
A
5
Pull-down Resistor
50
100
200
k
6
Non-operating Current Dissipation
IDD
Output release
VI=VSS or VDD30
300
μ
A
1 : TEST[3:0], XRST, CLKSEL, STBY, SCANEN, SCANMOD
2 : Input pin and dual-directional pin except 1.
3 : Output pin except MCKI and dual-directional pin except 8.
4 : MCKI
5 : Dual-directional pin
6 : PCLK, HREF, VREF, CD[7:0]
7 : Input pin and dual-directional pin except 6.
8 : D[15:0]
Input Clock
When CLKSEL input is “H”.
Clock Pin
Maximum Input Frequency (MHz)
Duty
CKI
60
50
±
10%
Note : The internal operation clock would be 30MHz at a maximum. For 60MHz input, the clock divided by
at least 2 must be used as the internal operation clock.
When CLKSEL input is “0” (PLL is used).
Clock Pin
Maximum Input Frequency (MHz)
Duty
CKI
100
50
±
10%
In addition, setup here must satisfy the following PLL input/output specifications.
Parameter
Symbol
min
typ
max
Unit
Maximum VCO Oscillation Frequency
f max
180
MHz
Minimum VCO Oscillation Frequency
f min
60
MHz
Phase Contrast Frequency
f ref
30.0
MHz
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