參數(shù)資料
型號(hào): LC75700T-TLM-E
廠商: ON Semiconductor
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 0K
描述: IC KEY SCANNING LSI 20TSSOP
標(biāo)準(zhǔn)包裝: 2,000
系列: *
No. 7632-6/16
LC75700T
Pin Functions
Pin
Pin No.
Function
Active
I/O
Handling when unused
KI1 to KI5
1 to 5
Key scan inputs. These pins have built-in pull-down resistors.
H
I
GND
Key scan outputs. Although normal key scan timing lines require diodes to be
KS1 to KS3
6 to 8
inserted in the timing lines to prevent shorts, since these outputs are unbalanced
0
Open
CMOS transistor outputs, these outputs will not be damaged by shorting when
these outputs are used to from a key matrix.
Key scan outputs and general-purpose output ports shared-function pins.
KS4/P4 to KS6/P2
9 to 11
These pins can be set the key scan output ports or the general-purpose output
0
Open
ports by the control data “KP1 and KP2”.
P1
12
The P1 is general-purpose output ports.
0
Open
OSC
14
Oscillator connection. An oscillator circuit is formed by connecting an external
I/O
VDD
resistor and capacitor at this pin.
Reset input. that re-initializes the LSI internal states. This pin must be used.
When RES is low (VSS)
— Key scanning disabled: KS1 to KS3 = low (VSS).
— Key scan outputs and general output ports shared-function pins:
KS4/P4 to KS6/P2 = low (VSS).
RES
16
— General-purpose output port: P1 = low (VSS).
L
I
GND
— All the key data is reset to low.
When RES is high (VDD)
— The states of the pins as key scan output pins or general-purpose output
ports, must be set with the control data.
— And key scanning is a enabled.
Note that serial data must be transferred when RES is high.
CE
18
Serial data interface. Connections to the controller. Note that DO, being
H
I
CL
19
an open-drain output, requires a pull-up resistor.
I
GND
CE: Chip enable
CL: Synchronization clock
DI
20
DI: Transfer data
I
DO
17
DO: Output data
O
Open
VDD
15
Power supply. A voltage of between 2.7 V and 5.5 V must be supplied.
VSS
13
Ground. Must be connected to the system ground.
v
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