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參數(shù)資料
| 型號(hào)： | LC74793 |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| 封裝： | SDIP-24 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 154K |
| 代理商： | LC74793 |
No. 5966-13/24
LC74793, 74793JM
Command 5 (Output control command 1)
First byte
DA 0 to 7
Register
Contents
Notes
Status
Function
7
—
1
First byte identification bit
6
—
1
Command 5 identification code.
5
—
1
Output control settings 1
4
—
1
3
—
0
2
—
1
—
0
—
1
Second byte
DA 0 to 7
Register
Contents
Notes
Status
Function
7
—
0
Second byte identification bit
6
SPO2
0
1
5
SPO1
0
1
4
SPO0
0
1
3
SJO1
0
1
2
SJO0
0
1
VNPSEL
0
Vertical signal falling edge detection
1
Vertical signal rising edge detection
0
VSPSEL
0
VSEP: About 8.9 s (NTSC)
1
VSEP: About 17.8 s (NTSC)
SPO2
SPO1
SPO0
SEPout pin
0
CSYNC
0
1
Slice data amplitude
0
1
0
O/E
0
1
CLK (acquisition)
1
0
VCO 1/1
1
0
1
VCO 1/2
1
0
VCO 1/3
1
VCO 1/4
SJO1
SJO0
SYNCJDG pin
0
SYNCjdg
0
1
LOCK
1
0
SYNCdet
1
DXout (Sliced data)
SEPOUT (pin 18) output switching
SYNCJDG (pin 8) output switching
Vertical signal acquisition polarity switching.
Only valid when internal vertical separation
used.
Internal vertical separation time switching
Note: All registers are cleared to 0 when the IC is reset by the RST pin.
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