1. 參數(shù)資料
      型號: LC74785
      元件分類: 畫面疊加
      英文描述: ON-SCREEN DISPLAY IC, PDIP24
      封裝: 0.300 INCH, PLASTIC, SDIP-24
      文件頁數(shù): 6/24頁
      文件大?。?/td> 266K
      代理商: LC74785
      No. 5520-14/24
      LC74785, LC74785M
      COMMAND4 (Display control setup command)
      First byte
      DA
      Register
      Contents
      Notes
      0 to 7
      State
      Function
      7
      1
      6
      1
      5
      0
      4
      0
      3
      TSTMOD
      0
      Normal operating mode
      This bit must be set to 0.
      1
      Test mode
      2
      RAMERS
      0
      1
      Erase display RAM. (Set the RAM data to 7F hexadecimal.)
      1
      OSCSTP
      0
      Do not stop the crystal and LC oscillators.
      1
      Stop the crystal and LC oscillators.
      0
      SYSRST
      0
      1
      Reset all registers and turn display off.
      Command 4 identification code
      Display control setup
      Second byte
      Note: All registers are set to 0 when the LC74785/M is reset by the RST pin.
      DA
      Register
      Contents
      Notes
      0 to 7
      State
      Function
      7
      0
      Second byte identification bit
      6
      BLK2
      0
      Character display area
      Specifies the size for complete fill in
      1
      Video display area
      5
      BLK1
      0
      1
      Changes the blanking size
      4
      BLK0
      0
      1
      3
      BK1
      0
      Blinking period: About 0.5 s
      Switches the blinking period
      1
      Blinking period: About 1.0 s
      2
      BK0
      0
      Blinking off
      1
      Blinking on
      1
      RV
      0
      Reverse (character reversing) off
      1
      Reverse (character reversing) on
      0
      DSPON
      0
      Character display off
      1
      Character display on
      Blinking in reverse video mode switches the display between
      normal character display and reverse video display.
      Erasing RAM takes about 500 s. (This operation
      must be executed in the DSPOFF state.)
      Valid in external synchronization mode when
      character display is off.
      The registers are reset when the CS1 pin is low,
      and the reset state is cleared when CS1 is set high,
      BLK0
      0
      1
      BLK1
      0
      Blanking off
      Character size
      1
      Border size Full character size
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