參數(shù)資料
型號: LC74782M
元件分類: 畫面疊加
英文描述: ON-SCREEN DISPLAY IC, PDSO24
封裝: MFP-24
文件頁數(shù): 6/16頁
文件大小: 183K
代理商: LC74782M
Second byte
Note: The register states are all set to zero when the LC74782/M is reset with the RST pin.
Display Screen Structure
The display consists of 24 characters
× 12 rows.
The maximum number of displayed character is 288.
The maximum number of characters is reduced to less than 288 when the character size is enlarged.
Display memory addresses are specified as row (0 to 11 decimal) and column (0 to 23 decimal) addresses.
Display Screen Structure (display memory addresses)
No. 4989-14/16
LC74782, 74782M
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
Second byte identification bit
6
0
5
0
V falling edge detection
Switches V acquisition polarity when
4
VNPSEL
internal V separation is used in external
1
V rising edge detection
mode.
3
VSPSEL
0
VSEP: about 8.9 s (for NTSC)
Switches the internal V separation time.
1
VSEP: about 17.8 s (for NTSC)
2
MSKERS
0
Mask valid
HSYNC and VSYNC mask release
1
Mask invalid
1
MSKSEL
0
3H (for NTSC)
Switches the VSYNC mask.
1
20H (for NTSC)
0
EGL
0
Border level 0 only (VBK0)
Switches the border level
1
Border level has two stages (VBK0, VBK1)
(Only valid for BLK0 = 0 and BLK1 = 1)
相關PDF資料
PDF描述
LC74782M ON-SCREEN DISPLAY IC, PDSO24
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LC74783M ON-SCREEN DISPLAY IC, PDSO24
LC74783M ON-SCREEN DISPLAY IC, PDSO24
LC74783 ON-SCREEN DISPLAY IC, PDIP24
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